Searched refs:mio (Results 1 - 7 of 7) sorted by relevance

/freebsd-11-stable/sys/contrib/octeon-sdk/
H A Dcvmx-ciu-defs.h1126 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_block_int::cvmx_ciu_block_int_s
1129 uint64_t mio : 1;
1229 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_block_int::cvmx_ciu_block_int_cn61xx
1232 uint64_t mio : 1;
1330 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_block_int::cvmx_ciu_block_int_cn63xx
1333 uint64_t mio : 1;
1440 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_block_int::cvmx_ciu_block_int_cn66xx
1443 uint64_t mio : 1;
1533 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_block_int::cvmx_ciu_block_int_cnf71xx
1536 uint64_t mio
3535 uint64_t mio : 1; /**< MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_s
3691 uint64_t mio : 1; /**< MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cn61xx
3762 uint64_t mio : 1; /**< MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cn63xx
3838 uint64_t mio : 1; /**< MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cn66xx
3911 uint64_t mio : 1; /**< MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cnf71xx
3996 uint64_t mio : 1; /**< Write 1 to clear MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_s
4114 uint64_t mio : 1; /**< Write 1 to clear MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cn61xx
4187 uint64_t mio : 1; /**< Write 1 to clear MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cn63xx
4265 uint64_t mio : 1; /**< Write 1 to clear MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cn66xx
4340 uint64_t mio : 1; /**< Write 1 to clear MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cnf71xx
4426 uint64_t mio : 1; /**< Write 1 to set MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_s
4544 uint64_t mio : 1; /**< Write 1 to set MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cn61xx
4617 uint64_t mio : 1; /**< Write 1 to set MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cn63xx
4695 uint64_t mio : 1; /**< Write 1 to set MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cn66xx
4770 uint64_t mio : 1; /**< Write 1 to set MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cnf71xx
5963 uint64_t mio : 1; /**< MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_s
6107 uint64_t mio : 1; /**< MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cn61xx
6178 uint64_t mio : 1; /**< MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cn63xx
6254 uint64_t mio : 1; /**< MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cn66xx
6327 uint64_t mio : 1; /**< MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cnf71xx
6412 uint64_t mio : 1; /**< Write 1 to clear MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_s
6530 uint64_t mio : 1; /**< Write 1 to clear MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cn61xx
6603 uint64_t mio : 1; /**< Write 1 to clear MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cn63xx
6681 uint64_t mio : 1; /**< Write 1 to clear MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cn66xx
6756 uint64_t mio : 1; /**< Write 1 to clear MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cnf71xx
6842 uint64_t mio : 1; /**< Write 1 to set MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_s
6960 uint64_t mio : 1; /**< Write 1 to set MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cn61xx
7033 uint64_t mio : 1; /**< Write 1 to set MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cn63xx
7111 uint64_t mio : 1; /**< Write 1 to set MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cn66xx
7186 uint64_t mio : 1; /**< Write 1 to set MIO boot interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cnf71xx
9172 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_s
9352 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cn61xx
9450 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cn63xx
9558 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cn66xx
9652 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cnf71xx
11064 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_sum1_iox_int::cvmx_ciu_sum1_iox_int_s
11170 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_sum1_iox_int::cvmx_ciu_sum1_iox_int_cn61xx
11277 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_sum1_iox_int::cvmx_ciu_sum1_iox_int_cn66xx
11374 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_sum1_iox_int::cvmx_ciu_sum1_iox_int_cnf71xx
11494 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_sum1_ppx_ip2::cvmx_ciu_sum1_ppx_ip2_s
11600 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_sum1_ppx_ip2::cvmx_ciu_sum1_ppx_ip2_cn61xx
11707 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_sum1_ppx_ip2::cvmx_ciu_sum1_ppx_ip2_cn66xx
11804 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_sum1_ppx_ip2::cvmx_ciu_sum1_ppx_ip2_cnf71xx
11924 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_sum1_ppx_ip3::cvmx_ciu_sum1_ppx_ip3_s
12030 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_sum1_ppx_ip3::cvmx_ciu_sum1_ppx_ip3_cn61xx
12137 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_sum1_ppx_ip3::cvmx_ciu_sum1_ppx_ip3_cn66xx
12234 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_sum1_ppx_ip3::cvmx_ciu_sum1_ppx_ip3_cnf71xx
12354 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_sum1_ppx_ip4::cvmx_ciu_sum1_ppx_ip4_s
12460 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_sum1_ppx_ip4::cvmx_ciu_sum1_ppx_ip4_cn61xx
12567 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_sum1_ppx_ip4::cvmx_ciu_sum1_ppx_ip4_cn66xx
12664 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu_sum1_ppx_ip4::cvmx_ciu_sum1_ppx_ip4_cnf71xx
[all...]
H A Dcvmx-trax-defs.h1508 uint64_t mio : 1; /**< Enable tracing of MIO accesses member in struct:cvmx_trax_filt_did::cvmx_trax_filt_did_s
1511 uint64_t mio : 1;
1546 uint64_t mio : 1; /**< Enable tracing of CIU and GPIO CSR's */ member in struct:cvmx_trax_filt_did::cvmx_trax_filt_did_cn31xx
1548 uint64_t mio : 1;
1605 uint64_t mio : 1; /**< Enable tracing of MIO accesses member in struct:cvmx_trax_filt_did::cvmx_trax_filt_did_cn61xx
1608 uint64_t mio : 1;
2485 uint64_t mio : 1; /**< Enable triggering on MIO accesses member in struct:cvmx_trax_trig0_did::cvmx_trax_trig0_did_s
2488 uint64_t mio : 1;
2523 uint64_t mio : 1; /**< Enable triggering on CIU and GPIO CSR's */ member in struct:cvmx_trax_trig0_did::cvmx_trax_trig0_did_cn31xx
2525 uint64_t mio
2582 uint64_t mio : 1; /**< Enable triggering on MIO accesses member in struct:cvmx_trax_trig0_did::cvmx_trax_trig0_did_cn61xx
3331 uint64_t mio : 1; /**< Enable triggering on MIO accesses member in struct:cvmx_trax_trig1_did::cvmx_trax_trig1_did_s
3369 uint64_t mio : 1; /**< Enable triggering on CIU and GPIO CSR's */ member in struct:cvmx_trax_trig1_did::cvmx_trax_trig1_did_cn31xx
3428 uint64_t mio : 1; /**< Enable triggering on MIO accesses member in struct:cvmx_trax_trig1_did::cvmx_trax_trig1_did_cn61xx
[all...]
H A Dcvmx-ciu2-defs.h2564 uint64_t mio : 1; /**< MIO boot interrupt-enable */ member in struct:cvmx_ciu2_en_iox_int_mio::cvmx_ciu2_en_iox_int_mio_s
2580 uint64_t mio : 1;
2621 uint64_t mio : 1; /**< Write 1 to clear CIU2_EN_xx_yy_MIO[MIO] */ member in struct:cvmx_ciu2_en_iox_int_mio_w1c::cvmx_ciu2_en_iox_int_mio_w1c_s
2637 uint64_t mio : 1;
2678 uint64_t mio : 1; /**< Write 1 to enable CIU2_EN_xx_yy_MIO[MIO] */ member in struct:cvmx_ciu2_en_iox_int_mio_w1s::cvmx_ciu2_en_iox_int_mio_w1s_s
2694 uint64_t mio : 1;
3668 uint64_t mio : 1; /**< MIO boot interrupt-enable */ member in struct:cvmx_ciu2_en_ppx_ip2_mio::cvmx_ciu2_en_ppx_ip2_mio_s
3684 uint64_t mio : 1;
3725 uint64_t mio : 1; /**< Write 1 to clear CIU2_EN_xx_yy_MIO[MIO] */ member in struct:cvmx_ciu2_en_ppx_ip2_mio_w1c::cvmx_ciu2_en_ppx_ip2_mio_w1c_s
3741 uint64_t mio
3782 uint64_t mio : 1; /**< Write 1 to enable CIU2_EN_xx_yy_MIO[MIO] */ member in struct:cvmx_ciu2_en_ppx_ip2_mio_w1s::cvmx_ciu2_en_ppx_ip2_mio_w1s_s
4772 uint64_t mio : 1; /**< MIO boot interrupt-enable */ member in struct:cvmx_ciu2_en_ppx_ip3_mio::cvmx_ciu2_en_ppx_ip3_mio_s
4829 uint64_t mio : 1; /**< Write 1 to clear CIU2_EN_xx_yy_MIO[MIO] */ member in struct:cvmx_ciu2_en_ppx_ip3_mio_w1c::cvmx_ciu2_en_ppx_ip3_mio_w1c_s
4886 uint64_t mio : 1; /**< Write 1 to enable CIU2_EN_xx_yy_MIO[MIO] */ member in struct:cvmx_ciu2_en_ppx_ip3_mio_w1s::cvmx_ciu2_en_ppx_ip3_mio_w1s_s
5876 uint64_t mio : 1; /**< MIO boot interrupt-enable */ member in struct:cvmx_ciu2_en_ppx_ip4_mio::cvmx_ciu2_en_ppx_ip4_mio_s
5933 uint64_t mio : 1; /**< Write 1 to clear CIU2_EN_xx_yy_MIO[MIO] */ member in struct:cvmx_ciu2_en_ppx_ip4_mio_w1c::cvmx_ciu2_en_ppx_ip4_mio_w1c_s
5990 uint64_t mio : 1; /**< Write 1 to enable CIU2_EN_xx_yy_MIO[MIO] */ member in struct:cvmx_ciu2_en_ppx_ip4_mio_w1s::cvmx_ciu2_en_ppx_ip4_mio_w1s_s
7069 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu2_raw_iox_int_mio::cvmx_ciu2_raw_iox_int_mio_s
7494 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu2_raw_ppx_ip2_mio::cvmx_ciu2_raw_ppx_ip2_mio_s
7919 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu2_raw_ppx_ip3_mio::cvmx_ciu2_raw_ppx_ip3_mio_s
8344 uint64_t mio : 1; /**< MIO boot interrupt member in struct:cvmx_ciu2_raw_ppx_ip4_mio::cvmx_ciu2_raw_ppx_ip4_mio_s
8790 uint64_t mio : 1; /**< MIO boot interrupt source member in struct:cvmx_ciu2_src_iox_int_mio::cvmx_ciu2_src_iox_int_mio_s
9230 uint64_t mio : 1; /**< MIO boot interrupt source member in struct:cvmx_ciu2_src_ppx_ip2_mio::cvmx_ciu2_src_ppx_ip2_mio_s
9673 uint64_t mio : 1; /**< MIO boot interrupt source member in struct:cvmx_ciu2_src_ppx_ip3_mio::cvmx_ciu2_src_ppx_ip3_mio_s
10113 uint64_t mio : 1; /**< MIO boot interrupt source member in struct:cvmx_ciu2_src_ppx_ip4_mio::cvmx_ciu2_src_ppx_ip4_mio_s
10441 uint64_t mio : 1; /**< MIO interrupt summary member in struct:cvmx_ciu2_sum_iox_int::cvmx_ciu2_sum_iox_int_s
10504 uint64_t mio : 1; /**< MIO interrupt summary member in struct:cvmx_ciu2_sum_ppx_ip2::cvmx_ciu2_sum_ppx_ip2_s
10567 uint64_t mio : 1; /**< MIO interrupt summary member in struct:cvmx_ciu2_sum_ppx_ip3::cvmx_ciu2_sum_ppx_ip3_s
10630 uint64_t mio : 1; /**< MIO interrupt summary member in struct:cvmx_ciu2_sum_ppx_ip4::cvmx_ciu2_sum_ppx_ip4_s
[all...]
H A Dcvmx-npi-defs.h4344 uint64_t mio : 1; /**< MIO_BOOT_ERR */ member in struct:cvmx_npi_rsl_int_blocks::cvmx_npi_rsl_int_blocks_s
4346 uint64_t mio : 1;
4413 uint64_t mio : 1; /**< MIO_BOOT_ERR */ member in struct:cvmx_npi_rsl_int_blocks::cvmx_npi_rsl_int_blocks_cn30xx
4415 uint64_t mio : 1;
4485 uint64_t mio : 1; /**< MIO_BOOT_ERR */ member in struct:cvmx_npi_rsl_int_blocks::cvmx_npi_rsl_int_blocks_cn38xx
4487 uint64_t mio : 1;
4553 uint64_t mio : 1; /**< MIO_BOOT_ERR */ member in struct:cvmx_npi_rsl_int_blocks::cvmx_npi_rsl_int_blocks_cn50xx
4555 uint64_t mio : 1;
H A Dcvmx-helper.c60 #include <asm/octeon/cvmx-mio-defs.h>
H A Dcvmx-pcie.c53 #include <asm/octeon/cvmx-mio-defs.h>
H A Dcvmx-npei-defs.h7088 uint64_t mio : 1; /**< MIO_BOOT_ERR */ member in struct:cvmx_npei_rsl_int_blocks::cvmx_npei_rsl_int_blocks_s
7090 uint64_t mio : 1;

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