/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Option/ |
H A D | OptSpecifier.h | 29 unsigned getID() const { return ID; } function in class:llvm::opt::OptSpecifier 31 bool operator==(OptSpecifier Opt) const { return ID == Opt.getID(); }
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H A D | OptTable.h | 77 unsigned id = Opt.getID();
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H A D | Option.h | 87 unsigned getID() const { function in class:llvm::opt::Option
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | RegisterBank.cpp | 62 return ContainedRegClasses.test(RC.getID()); 75 assert((OtherRB.getID() != getID() || &OtherRB == this) && 91 OS << "(ID:" << getID() << ", Size:" << getSize() << ")\n"
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/freebsd-11-stable/contrib/llvm-project/clang/lib/Frontend/ |
H A D | TextDiagnosticPrinter.cpp | 58 if (Info.getID() == diag::fatal_too_many_errors) { 73 DiagnosticIDs::isBuiltinWarningOrExtension(Info.getID()) && 74 !DiagnosticIDs::isDefaultMappingAsError(Info.getID())) { 79 StringRef Opt = DiagnosticIDs::getWarningOptionForDiag(Info.getID()); 93 DiagnosticIDs::getCategoryNumberForDiag(Info.getID());
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | ResourcePriorityQueue.cpp | 60 RegLimit[RC->getID()] = TRI->getRegPressureLimit(RC, *IS->MF); 95 && (TLI->getRegClassFor(VT)->getID() == RCId)) { 133 && (TLI->getRegClassFor(VT)->getID() == RCId)) { 330 && TLI->getRegClassFor(VT)->getID() == RCId) 341 && TLI->getRegClassFor(VT)->getID() == RCId) 361 RegBalance += rawRegPressureDelta(SU, RC->getID()); 365 if ((RegPressure[RC->getID()] + 366 rawRegPressureDelta(SU, RC->getID()) > 0) && 367 (RegPressure[RC->getID()] + 368 rawRegPressureDelta(SU, RC->getID()) > [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | RegisterBank.h | 47 unsigned getID() const { return ID; } function in class:llvm::RegisterBank
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H A D | RegisterBankInfo.h | 230 unsigned getID() const { return ID; } 254 return getID() != InvalidMappingID && OperandsMapping; 708 /// \p OpdMapper.getInstrMapping().getID() carries the information of 716 if (OpdMapper.getInstrMapping().getID() == DefaultMappingID)
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 80 switch (RC->getID()) { 250 if (!HST.useHVXOps() || NewRC->getID() != Hexagon::HvxWRRegClass.getID()) 252 bool SmallSrc = SrcRC->getID() == Hexagon::HvxVRRegClass.getID(); 253 bool SmallDst = DstRC->getID() == Hexagon::HvxVRRegClass.getID(); 321 switch (RC.getID()) {
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H A D | HexagonMachineScheduler.cpp | 588 << ((Q.getID() == TopQID) ? "(top|" : "(bot|")); 597 if (Q.getID() == TopQID) { 640 if (Q.getID() == TopQID) { 676 if (IsAvailableAmt && pressureChange(SU, Q.getID() != TopQID) > 0 && 692 if (Q.getID() == TopQID && 696 } else if (Q.getID() == BotQID && 705 if (Q.getID() == TopQID && getWeakLeft(SU, true) == 0) { 714 } else if (Q.getID() == BotQID && getWeakLeft(SU, false) == 0) { 731 if (Q.getID() == TopQID) { 798 if ((Q.getID() [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Option/ |
H A D | Option.cpp | 100 if (getID() == Opt.getID()) 241 if (getID() == UnaliasedOption.getID())
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H A D | ArgList.cpp | 40 OptRanges.insert(std::make_pair(O.getID(), emptyRange())).first->second; 54 OptRanges.erase(Id.getID()); 61 auto I = OptRanges.find(Id.getID());
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/freebsd-11-stable/contrib/llvm-project/clang/include/clang/AST/ |
H A D | CommentCommandTraits.h | 33 unsigned getID() const { function in struct:clang::comments::CommandInfo
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 195 assert((RegBank->getID() == ARM::GPRRegBankID || 196 RegBank->getID() == ARM::FPRRegBankID) && 199 if (RegBank->getID() == ARM::FPRRegBankID) { 245 RBI.getRegBank(VReg0, MRI, TRI)->getID() == ARM::FPRRegBankID && 250 RBI.getRegBank(VReg1, MRI, TRI)->getID() == ARM::GPRRegBankID && 255 RBI.getRegBank(VReg2, MRI, TRI)->getID() == ARM::GPRRegBankID && 277 RBI.getRegBank(VReg0, MRI, TRI)->getID() == ARM::GPRRegBankID && 282 RBI.getRegBank(VReg1, MRI, TRI)->getID() == ARM::GPRRegBankID && 287 RBI.getRegBank(VReg2, MRI, TRI)->getID() == ARM::FPRRegBankID && 520 if (RBI.getRegBank(Reg, MRI, TRI)->getID() ! [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineScheduler.cpp | 538 unsigned PredID = Pred->getID(); 542 if (PredID == P->getID()) 550 return PredID == S.first->getID(); 557 unsigned SuccID = Succ->getID(); 561 if (SuccID == S.first->getID()) { 573 [=](SIScheduleBlock *P) { return SuccID == P->getID(); }) && 647 return CurrentBlocks[Node2CurrentBlock[SU->NodeNum]]->getID() == ID; 1305 if (!--TopDownBlock2Index[Pred->getID()]) 1306 WorkList.push_back(Pred->getID()); 1315 assert(TopDownBlock2Index[i] > TopDownBlock2Index[Pred->getID()] [all...] |
/freebsd-11-stable/contrib/llvm-project/lld/lib/Driver/ |
H A D | DarwinLdDriver.cpp | 344 switch (kind->getOption().getID()) { 401 switch (minOS->getOption().getID()) { 706 if (mod->getOption().getID() == OPT_multi_module) 736 (pie->getOption().getID() == OPT_pie)) { 743 (pie->getOption().getID() == OPT_pie)) { 749 if (pie->getOption().getID() == OPT_no_pie) { 757 ctx.setPIE(pie->getOption().getID() == OPT_pie); 779 flagOn = arg->getOption().getID() == OPT_version_load_command; 780 flagOff = arg->getOption().getID() == OPT_no_version_load_command; 827 flagOn = arg->getOption().getID() [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/tools/llvm-readobj/ |
H A D | StackMapPrinter.h | 39 W.startLine() << " Record ID: " << R.getID()
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | RegisterClassInfo.h | 74 const RCInfo &RCI = RegClass[RC->getID()];
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H A D | StackMaps.h | 47 uint64_t getID() const { return MI->getOperand(IDPos).getImm(); } function in class:llvm::StackMapOpers 101 uint64_t getID() const { return getMetaOper(IDPos).getImm(); } function in class:llvm::PatchPointOpers 177 uint64_t getID() const { return MI->getOperand(IDPos).getImm(); } function in class:llvm::StatepointOpers
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H A D | TargetRegisterInfo.h | 67 unsigned getID() const { return MC->getID(); } function in class:llvm::TargetRegisterClass 124 unsigned ID = RC->getID(); 654 return RCInfos[getNumRegClasses() * HwMode + RC.getID()]; 1117 bool isValid() const { return getID() != NumRegClasses; } 1120 unsigned getID() const { return ID; }
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/freebsd-11-stable/contrib/llvm-project/clang/lib/ARCMigrate/ |
H A D | TransProtectedScope.cpp | 119 if (I->getID() == diag::err_switch_into_protected_scope && 132 assert(DiagI->getID() == diag::err_switch_into_protected_scope); 158 Pass.TA.clearDiagnostic(Diag.getID(), Diag.getLocation());
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H A D | PlistReporter.cpp | 96 DiagIDs.getCategoryNumberForDiag(D.getID()))) << '\n';
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/freebsd-11-stable/contrib/llvm-project/lld/ELF/ |
H A D | DriverUtils.cpp | 61 if (arg->getOption().getID() == OPT_color_diagnostics) { 63 } else if (arg->getOption().getID() == OPT_no_color_diagnostics) { 175 switch (arg->getOption().getID()) {
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Analysis/ |
H A D | MemorySSA.h | 127 // getID() 217 inline unsigned getID() const; 338 OptimizedID = DMA->getID(); 343 return getDefiningAccess() && OptimizedID == getDefiningAccess()->getID(); 397 OptimizedID = MA->getID(); 405 return getOptimized() && OptimizedID == getOptimized()->getID(); 415 unsigned getID() const { return ID; } function in class:llvm::final 636 unsigned getID() const { return ID; } function in class:llvm::final 665 inline unsigned MemoryAccess::getID() const { function in class:llvm::MemoryAccess 669 return MD->getID(); [all...] |
/freebsd-11-stable/contrib/llvm-project/clang/lib/Analysis/ |
H A D | ProgramPoint.cpp | 72 Out << RS->getID(Context) << ", \"stmt\": "; 190 << "\", \"stmt_id\": " << S->getID(Context)
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