/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | CodeGenInstruction.cpp | 35 if (Init->getDef()->getName() != "outs") 47 if (Init->getDef()->getName() != "ins") 75 Record *Rec = Arg->getDef(); 97 cast<DefInit>(MIOpInfo->getOperator())->getDef()->getName() != "ops") 518 return Constraint->getDef()->isSubClassOf("TypedOperand") && 519 Constraint->getDef()->getValueAsBit(PropertyName); 536 Record *ResultRecord = ADI ? ADI->getDef() : nullptr; 538 if (ADI && ADI->getDef() == InstOpRec) { 553 if (ADI && ADI->getDef()->isSubClassOf("RegisterOperand")) 554 ADI = ADI->getDef() [all...] |
H A D | OptParserEmitter.cpp | 113 OS << getOptionName(*DI->getDef()); 161 GroupFlags = DI->getDef()->getValueAsListInit("Flags"); 162 OS << getOptionName(*DI->getDef()); 169 OS << getOptionName(*DI->getDef()); 194 << cast<DefInit>(I)->getDef()->getName(); 198 << cast<DefInit>(I)->getDef()->getName();
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H A D | PseudoLoweringEmitter.cpp | 80 if (DI->getDef()->isSubClassOf("Register") || 81 DI->getDef()->getName() == "zero_reg") { 83 OperandMap[BaseIdx + i].Data.Reg = DI->getDef(); 92 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec) 94 "Pseudo operand type '" + DI->getDef()->getName() + 134 Record *Operator = OpDef->getDef();
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H A D | RegisterBankEmitter.cpp | 59 const Record &getDef() const { return TheDef; } function in class:__anon3399::RegisterBank 66 for (const auto &RCDef : getDef().getValueAsListOfDefs("RegisterClasses")) 307 PrintWarning(Bank.getDef().getLoc(), "Register bank names should be " 310 PrintNote(Bank.getDef().getLoc(), "RegisterBank was declared here");
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H A D | OptRSTEmitter.cpp | 45 OptionsByGroup[DI->getDef()->getValueAsString("Name")].push_back(Opts[i]);
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H A D | GICombinerEmitter.cpp | 201 const Record &getDef() const { return TheDef; } function in class:__anon2928::CombineRule 285 if (OpI->getDef()->getName() == Def) 296 if (OpI->getDef()->isSubClassOf(Cls)) 297 return OpI->getDef(); 310 if (OpI->getDef()->getName() == Name) 324 if (OpI->getDef()->isSubClassOf(Cls)) 742 const Record &RuleDef = Rule->getDef(); 869 PrintFatalError(Rule->getDef().getLoc(), "All rules must have a root"); 993 Record *CombinerDef = RK.getDef(Combiner);
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H A D | CodeGenDAGPatterns.cpp | 1361 Record *R = DI->getDef(); 1572 !static_cast<DefInit*>(NodeToApply->getLeafValue())->getDef() 1579 auto VVT = getValueTypeByHwMode(DI->getDef(), T.getHwModes()); 1801 Op = DI->getDef(); 1900 return ((DI->getDef() == NDI->getDef()) 1961 cast<DefInit>(Val)->getDef()->getName() == "node")) { 2253 Rec = DI->getDef(); 2270 if (DI && DI->getDef()->isSubClassOf("Operand")) { 2271 DagInit *MIOps = DI->getDef() [all...] |
H A D | RISCVCompressInstEmitter.cpp | 209 if (DI->getDef()->isSubClassOf("Register")) { 211 if (!validateRegister(DI->getDef(), Inst.Operands[i].Rec)) 214 "'Register: '" + DI->getDef()->getName() + 218 OperandMap[i].Data.Reg = DI->getDef(); 225 if (!validateTypes(DI->getDef(), Inst.Operands[i].Rec, IsSourceInst)) 229 DI->getDef()->getName() + 292 return Type1->getDef() == Type2->getDef();
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H A D | SearchableTableEmitter.cpp | 123 return Field.Enum->EntryMap[cast<DefInit>(I)->getDef()]->first; 130 return DI->getDef()->isSubClassOf("Intrinsic"); 137 Intr = std::make_unique<CodeGenIntrinsic>(cast<DefInit>(I)->getDef()); 232 Record *LHSr = cast<DefInit>(LHSI)->getDef(); 233 Record *RHSr = cast<DefInit>(RHSI)->getDef(); 248 auto LHSr = cast<DefInit>(LHSI)->getDef(); 249 auto RHSr = cast<DefInit>(RHSI)->getDef(); 529 Record *TypeRec = DI->getDef();
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H A D | X86FoldTablesEmitter.cpp | 303 Record *AltRegInstRec = Records.getDef(AltRegInstStr); 649 Record *RegInstIter = Records.getDef(Entry.RegInstStr); 650 Record *MemInstIter = Records.getDef(Entry.MemInstStr);
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H A D | CodeEmitterGen.cpp | 272 EncodingInfoByHwMode EBM(DI->getDef(), HWM); 369 EncodingInfoByHwMode EBM(DI->getDef(), HWM); 411 EncodingInfoByHwMode EBM(DI->getDef(), HWM);
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H A D | GlobalISelEmitter.cpp | 376 if (VDefInit->getDef()->isSubClassOf("RegisterOperand")) 377 return VDefInit->getDef()->getValueAsDef("RegClass"); 378 if (VDefInit->getDef()->isSubClassOf("RegisterClass")) 379 return VDefInit->getDef(); 1308 RC.getDef() == cast<RegisterBankOperandMatcher>(&B)->RC.getDef(); 3511 &Target.getInstruction(RK.getDef("G_CONSTANT"))); 3730 Record *CCDef = DI ? DI->getDef() : nullptr; 3820 auto *ChildRec = ChildDefInit->getDef(); 3934 auto *ChildRec = ChildDefInit->getDef(); [all...] |
H A D | InstrDocsEmitter.cpp | 166 cast<DefInit>(Op.MIOperandInfo->getArg(SubOpIdx))->getDef();
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H A D | X86EVEX2VEXTablesEmitter.cpp | 208 Record *AltInstRec = Records.getDef(AltInstStr);
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H A D | InstrInfoEmitter.cpp | 131 auto *OpR = cast<DefInit>(MIOI->getArg(j))->getDef(); 389 OperandRecords.push_back(cast<DefInit>(Arg)->getDef());
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H A D | FastISelEmitter.cpp | 261 Record *OpLeafRec = OpDI->getDef(); 436 Record *OpLeafRec = cast<DefInit>(Op->getLeafValue())->getDef(); 507 SubRegNo = getQualifiedName(SR->getDef());
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/TableGen/ |
H A D | SetTheory.cpp | 214 cast<DefInit>(Expr->getOperator())->getDef()->getRecords(); 225 Record *Rec = Records.getDef(OS.str()); 285 if (const RecVec *Result = expand(Def->getDef())) 287 Elts.insert(Def->getDef()); 302 auto I = Operators.find(OpInit->getDef()->getName());
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H A D | JSONBackend.cpp | 81 obj["def"] = Def->getDef()->getName();
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/freebsd-11-stable/contrib/llvm-project/clang/utils/TableGen/ |
H A D | ClangOptionDocEmitter.cpp | 62 R = G->getDef(); 73 Group = SkipFlattened(G->getDef()); 79 Aliases[A->getDef()].push_back(R); 98 Group = SkipFlattened(G->getDef()); 384 const Record *DocInfo = Records.getDef("GlobalDocumentation");
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H A D | ClangSACheckersEmitter.cpp | 32 name = getPackageFullName(DI->getDef()); 136 return isHidden(DI->getDef());
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H A D | ClangDiagnosticsEmitter.cpp | 85 std::string CatName = getCategoryFromDiagGroup(Group->getDef(), 171 std::string GroupName = DI->getDef()->getValueAsString("GroupName"); 227 const Record *NextDiagGroup = GroupInit->getDef(); 246 const Record *NextDiagGroup = GroupInit->getDef(); 382 const Record *GroupRec = Group->getDef(); 401 if (groupInPedantic(Group->getDef())) 1228 const Record *GroupRec = Group->getDef(); 1260 DiagsInGroup.find(DI->getDef()->getValueAsString("GroupName")); 1676 const Record *Documentation = Records.getDef("GlobalDocumentation");
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H A D | MveEmitter.cpp | 1025 return getType(Def->getDef(), Param); 1053 Record *Op = cast<DefInit>(D->getOperator())->getDef(); 1119 Record *Op = cast<DefInit>(D->getOperator())->getDef(); 1168 Record *TypeRec = cast<DefInit>(D->getArg(0))->getDef(); 1232 Record *Rec = DI->getDef(); 1311 if (TypeDI->getDef()->isSubClassOf("unpromoted")) 1323 Record *TypeRec = TypeDI->getDef(); 1369 Record *MainOp = cast<DefInit>(CodeDag->getOperator())->getDef();
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H A D | ClangOpcodesEmitter.cpp | 74 for (auto *Type : TypeClass->getDef()->getValueAsListOfDefs("Types")) { 294 auto Cases = TypeClass->getDef()->getValueAsListOfDefs("Types");
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | MemoryDependenceAnalysis.cpp | 219 return MemDepResult::getDef(Inst); 429 return MemDepResult::getDef(ClosestDependency); 436 MemDepResult::getDef(ClosestDependency), nullptr)); 540 return MemDepResult::getDef(II); 587 return MemDepResult::getDef(Inst); 614 return MemDepResult::getDef(Inst); 655 return MemDepResult::getDef(Inst); 670 return MemDepResult::getDef(Inst);
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Analysis/ |
H A D | MemoryDependenceAnalysis.h | 131 static MemDepResult getDef(Instruction *Inst) { function in class:llvm::MemDepResult
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