Searched refs:dpcd (Results 1 - 6 of 6) sorted by relevance

/freebsd-11-stable/sys/dev/drm2/
H A Ddrm_dp_helper.c114 void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]) { argument
115 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
118 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
122 void drm_dp_link_train_channel_eq_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]) { argument
123 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
126 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
H A Ddrm_dp_helper.h338 void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]);
339 void drm_dp_link_train_channel_eq_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]);
345 drm_dp_max_link_rate(u8 dpcd[DP_RECEIVER_CAP_SIZE]) argument
347 return drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]);
351 drm_dp_max_lane_count(u8 dpcd[DP_RECEIVER_CAP_SIZE]) argument
353 return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
/freebsd-11-stable/sys/dev/drm2/radeon/
H A Datombios_dp.c360 u8 dpcd[DP_DPCD_SIZE],
364 int max_link_rate = drm_dp_max_link_rate(dpcd);
365 int max_lane_num = drm_dp_max_lane_count(dpcd);
379 u8 dpcd[DP_DPCD_SIZE],
389 lane_num = radeon_dp_get_dp_lane_number(connector, dpcd, pix_clock);
402 return drm_dp_max_link_rate(dpcd);
438 if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT))
459 memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE);
469 dig_connector->dpcd[0] = 0;
519 radeon_dp_get_dp_link_clock(connector, dig_connector->dpcd, mod
359 radeon_dp_get_dp_lane_number(struct drm_connector *connector, u8 dpcd[DP_DPCD_SIZE], int pix_clock) argument
378 radeon_dp_get_dp_link_clock(struct drm_connector *connector, u8 dpcd[DP_DPCD_SIZE], int pix_clock) argument
581 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member in struct:radeon_dp_link_train_info
[all...]
H A Dradeon_mode.h430 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member in struct:radeon_connector_atom_dig
/freebsd-11-stable/sys/dev/drm2/i915/
H A Dintel_dp.c138 int max_link_bw = intel_dp->dpcd[DP_MAX_LINK_RATE];
195 int max_lanes = drm_dp_max_lane_count(intel_dp->dpcd);
686 int max_lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
847 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 &&
848 (intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP)) {
1280 if (intel_dp->dpcd[DP_DPCD_REV] < 0x11)
1843 drm_dp_link_train_clock_recovery_delay(intel_dp->dpcd);
1931 drm_dp_link_train_channel_eq_delay(intel_dp->dpcd);
2051 if (intel_dp_aux_native_read_retry(intel_dp, 0x000, intel_dp->dpcd,
2052 sizeof(intel_dp->dpcd))
2175 uint8_t *dpcd = intel_dp->dpcd; local
[all...]
H A Dintel_drv.h387 uint8_t dpcd[DP_RECEIVER_CAP_SIZE]; member in struct:intel_dp

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