Searched refs:al_reg_write32 (Results 1 - 10 of 10) sorted by relevance
/freebsd-11-stable/sys/contrib/alpine-hal/eth/ |
H A D | al_hal_eth_main.c | 385 al_reg_write32(&adapter->ec_regs_base->epe_p[idx].comp_data, reg_entry->data); 386 al_reg_write32(&adapter->ec_regs_base->epe_p[idx].comp_mask, reg_entry->mask); 387 al_reg_write32(&adapter->ec_regs_base->epe_p[idx].comp_ctrl, reg_entry->ctrl); 389 al_reg_write32(&adapter->ec_regs_base->msp_c[idx].p_comp_data, reg_entry->data); 390 al_reg_write32(&adapter->ec_regs_base->msp_c[idx].p_comp_mask, reg_entry->mask); 391 al_reg_write32(&adapter->ec_regs_base->msp_c[idx].p_comp_ctrl, reg_entry->ctrl); 394 al_reg_write32(&adapter->ec_regs_base->epe[0].act_table_addr, idx); 395 al_reg_write32(&adapter->ec_regs_base->epe[0].act_table_data_6, 397 al_reg_write32(&adapter->ec_regs_base->epe[0].act_table_data_2, 399 al_reg_write32( [all...] |
H A D | al_hal_eth_kr.c | 222 al_reg_write32(&adapter->mac_regs_base->kr.an_addr, reg_addr); 225 al_reg_write32(&adapter->mac_regs_base->kr.pma_addr, reg_addr); 235 al_reg_write32(&adapter->mac_regs_base->gen_v3.an_lt_0_addr, 237 al_reg_write32(&adapter->mac_regs_base->gen_v3.an_lt_0_data, 240 al_reg_write32(&adapter->mac_regs_base->gen_v3.an_lt_0_addr, 245 al_reg_write32(&adapter->mac_regs_base->gen_v3.an_lt_1_addr, 247 al_reg_write32(&adapter->mac_regs_base->gen_v3.an_lt_1_data, 250 al_reg_write32(&adapter->mac_regs_base->gen_v3.an_lt_1_addr, 255 al_reg_write32(&adapter->mac_regs_base->gen_v3.an_lt_2_addr, 257 al_reg_write32( [all...] |
/freebsd-11-stable/sys/contrib/alpine-hal/ |
H A D | al_hal_udma_config.c | 55 al_reg_write32(&axi_regs->cfg_1, axi->axi_timeout); 60 al_reg_write32(&axi_regs->cfg_2, reg); 88 al_reg_write32(&axi_regs->endian_cfg, reg); 109 al_reg_write32(cfg_1, reg); 124 al_reg_write32(cfg_2, reg); 130 al_reg_write32(cfg_max_beats, reg); 161 al_reg_write32(&udma->udma_regs->m2s.axi_m2s.data_rd_cfg, reg); 168 al_reg_write32(&udma->udma_regs->m2s.axi_m2s.desc_wr_cfg_1, reg); 186 al_reg_write32(&udma->udma_regs->m2s.axi_m2s.ostand_cfg, reg); 206 al_reg_write32(cfg_ [all...] |
H A D | al_hal_iofic.c | 58 al_reg_write32(®s->ctrl[group].int_control_grp, flags); 81 al_reg_write32(®s->ctrl[group].int_control_grp, reg); 103 al_reg_write32(®s->ctrl[group].int_control_grp, reg); 126 al_reg_write32(®s->grp_int_mod[group][vector].grp_int_mod_reg, reg); 151 al_reg_write32(®s->grp_int_mod[group][vector].grp_int_vmid_reg, reg); 200 al_reg_write32(®s->ctrl[group].int_mask_grp, reg | mask); 240 al_reg_write32(®s->ctrl[group].int_cause_grp, ~mask); 253 al_reg_write32(®s->ctrl[group].int_cause_set_grp, mask); 267 al_reg_write32(®s->ctrl[group].int_abort_msk_grp, mask); 288 al_reg_write32( [all...] |
H A D | al_hal_udma_main.c | 90 al_reg_write32(&tmp_unit_regs->gen.axi.cfg_1, 0); 93 al_reg_write32(&tmp_unit_regs->gen.axi.cfg_1, 1000000); 95 al_reg_write32(&tmp_unit_regs->m2s.m2s_comp.cfg_application_ack 103 al_reg_write32(&udma->udma_regs->m2s.axi_m2s.desc_wr_cfg_1 109 al_reg_write32( 133 al_reg_write32(reg_addr, val); 167 al_reg_write32(reg_addr, val); 177 al_reg_write32(&udma_q->udma->udma_regs->s2m.s2m_comp.cfg_1c 194 al_reg_write32(&udma_q->q_regs->rings.drbp_low, 196 al_reg_write32( [all...] |
H A D | al_hal_pcie.c | 111 al_reg_write32(&pcie_port->regs->port_regs->rd_only_wr_en, 131 al_reg_write32((uint32_t *)((uintptr_t)offset | cs2_bit), val); 239 al_reg_write32(®s->app.parity->en_core, 269 al_reg_write32(regs->axi.parity.en_axi, 407 al_reg_write32(®s->port_regs->ack_lat_rply_timer, reg); 544 al_reg_write32(®s->port_regs->gen2_ctrl, gen2_ctrl); 582 al_reg_write32(regs->core_space[0].pcie_sec_ext_cap_base + (4 >> 2), 593 al_reg_write32((uint32_t *)(lanes_eq_base + i), eq_control); 609 al_reg_write32(®s->port_regs->gen3_ctrl, reg); 619 al_reg_write32( [all...] |
H A D | al_hal_serdes.c | 1077 al_reg_write32( 1103 al_reg_write32( 1107 al_reg_write32(&grp_info->regs_base->gen.reg_data, data); 1317 al_reg_write32(&lane_regs->ictl_multi_rxeq, 1336 al_reg_write32(&lane_regs->ictl_multi_rxeq, 0); 2108 al_reg_write32( 2134 al_reg_write32(&grp_info->regs_base->gen.irst, 0x000000); 2135 al_reg_write32(&grp_info->regs_base->lane[0].ictl_multi, 0x10110010); 2136 al_reg_write32(&grp_info->regs_base->lane[1].ictl_multi, 0x10110010); 2137 al_reg_write32( [all...] |
H A D | al_hal_reg_utils.h | 178 al_reg_write32(reg, AL_MASK_VAL(mask, data, temp));
|
H A D | al_hal_plat_services.h | 185 #define al_reg_write32(l,v) do { dsb(); generic_bs_w_4(NULL, (bus_space_handle_t)l, 0, v); dmb(); } while (0) macro
|
H A D | al_hal_udma_debug.c | 209 al_reg_write32(&udma->udma_regs->m2s.m2s.indirect_ctrl, qid); 326 al_reg_write32(&udma->udma_regs->m2s.m2s.indirect_ctrl, qid);
|
Completed in 327 milliseconds