Searched refs:al_dbg (Results 1 - 9 of 9) sorted by relevance

/freebsd-11-stable/sys/contrib/alpine-hal/
H A Dal_hal_udma_debug.c52 al_dbg("M2S AXI regs:\n");
77 al_dbg("M2S general regs:\n");
109 al_dbg("M2S read regs:\n");
132 al_dbg("M2S DWRR regs:\n");
138 al_dbg("M2S rate limiter regs:\n");
144 al_dbg("M2S stream rate limiter regs:\n");
160 al_dbg("M2S completion regs:\n");
186 al_dbg("M2S statistics regs:\n");
199 al_dbg("M2S feature regs:\n");
208 al_dbg("M2
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H A Dal_hal_udma_debug.h61 al_dbg(PREFIX #REG " = 0x%08x" POSTFIX, al_reg_read32( \
66 al_dbg(PREFIX #LBL " = " FMT POSTFIX, al_reg_read32( \
72 al_dbg(PREFIX #LBL " = %d" POSTFIX, ((al_reg_read32( \
H A Dal_hal_udma_iofic.c110 al_dbg("%s: base.%p mode %d\n", __func__, base, mode);
135 al_dbg("%s base.%p mode %d\n", __func__, regs, mode);
H A Dal_hal_udma_main.c281 al_dbg("udma [%s] initialized. base %p\n", udma->name,
367 al_dbg("udma [%s %d]: %s q init. size 0x%x\n"
480 al_dbg("udma [%s]: requested state identical to "
483 al_dbg("udma [%s]: change state from (%s) to (%s)\n",
611 al_dbg("udma [%s %d]: packet completed. first desc %p (ixd 0x%x)"
H A Dal_hal_pcie.c186 al_dbg("PCIe %d: link config: max speed gen %d, max lanes %d, reversal %s\n",
502 al_dbg("PCIe %d: Port Debug 0: 0x%08x. LTSSM state :0x%x\n",
521 al_dbg("PCIe %d: Gen2 params config: Tx Swing %s, interrupt on link Eq %s, set Deemphasis %s\n",
572 al_dbg("PCIe %d: Gen3 params config: Equalization %s, interrupt on link Eq %s\n",
592 al_dbg("PCIe %d: Set EQ (0x%08x) for lane %d, %d\n", pcie_port->port_id, eq_control, i, i + 1);
911 al_dbg("PCIe %d: configuring SRIS with default values kp_gen3[%d] kp_gen21[%d]\n",
1263 al_dbg("pcie port handle initialized. port id: %d, rev_id %d, regs base %p\n",
1291 al_dbg("PCIe %d: pf handle initialized. pf number: %d, rev_id %d, regs %p\n",
1344 al_dbg("PCIe %d: operating mode already set to %s\n",
1631 al_dbg("PCI
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H A Dal_hal_plat_services.h265 #define al_dbg(...) do { if (AL_DBG_LEVEL >= AL_DBG_LEVEL_DBG) { AL_DBG_LOCK(); printf(__VA_ARGS__); AL_DBG_UNLOCK(); } } while(0) macro
H A Dal_hal_serdes.c177 al_dbg(
207 al_dbg(
231 al_dbg(
262 al_dbg(
1196 al_dbg("%s(%d): actually disabling\n", __func__, lane);
1283 al_dbg("%s(%d): actually enabling\n", __func__, lane);
1557 al_dbg("%s: current txdeemph: c0 = 0x%x c1 = 0x%x c-1 = 0x%x\n",
1588 al_dbg("%s: sum of all tx de-emphasis over the max limit\n",
1594 al_dbg("%s: new txdeemph: c0 = 0x%x c1 = 0x%x c-1 = 0x%x\n",
1615 al_dbg("
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/freebsd-11-stable/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth_main.c429 al_dbg("eth [%s]: disable rx parser\n", adapter->name);
439 al_dbg("eth [%s]: enable rx parser\n", adapter->name);
476 al_dbg("[%s]: %s - reg %d. val 0x%x",
499 al_dbg("[%s]: %s - reg %d. val 0x%x",
521 al_dbg("[%s]: %s - reg %d. val 0x%x",
544 al_dbg("[%s]: %s - reg %d. val 0x%x",
561 al_dbg("eth [%s]: initialize controller's UDMA. id = %d\n", params->name, params->udma_id);
562 al_dbg("eth [%s]: UDMA base regs: %p\n", params->name, params->udma_regs_base);
563 al_dbg("eth [%s]: EC base regs: %p\n", params->name, params->ec_regs_base);
564 al_dbg("et
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H A Dal_hal_eth_kr.c281 al_dbg("[%s]: %s - (%s) lane %d, reg %d, val 0x%x", adapter->name, __func__,
362 al_dbg("[%s]: %s - (%s) lane %d, reg %d, val 0x%x", adapter->name, __func__,
893 al_dbg("[%s]: autonegotiation initialized successfully", adapter->name);
904 al_dbg("Eth [%s]: enable autonegotiation. lt_en %s",
963 al_dbg("[%s]: KR LT Restart Link Training.\n", adapter->name);
973 al_dbg("[%s]: KR LT Stop Link Training.\n", adapter->name);
982 al_dbg("[%s]: KR LT Initialize.\n", adapter->name);
1018 al_dbg("[%s]: Frame lock received."

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