Searched refs:Vec2 (Results 1 - 6 of 6) sorted by relevance
| /freebsd-11-stable/contrib/llvm-project/clang/lib/AST/ |
| H A D | ASTStructuralEquivalence.cpp | 588 const auto *Vec2 = cast<DependentSizedExtVectorType>(T2); local
590 Vec2->getSizeExpr()))
593 Vec2->getElementType()))
600 const auto *Vec2 = cast<DependentVectorType>(T2); local
601 if (Vec1->getVectorKind() != Vec2->getVectorKind())
604 Vec2->getSizeExpr()))
607 Vec2->getElementType()))
615 const auto *Vec2 = cast<VectorType>(T2); local
617 Vec2->getElementType()))
619 if (Vec1->getNumElements() != Vec2
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 1882 SDValue Vec2;
1884 Vec2 = IntermedVals[1].first;
1886 Vec2 = DAG.getUNDEF(VT);
1895 Res = DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec);
1997 SDValue Vec2;
1999 Vec2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value2);
2001 Vec2 = DAG.getUNDEF(VT);
2004 return DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec);
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 289 Value *Vec2 = nullptr; local
312 else if (!Vec2 || Vec2 == Vec)
313 Vec2 = Vec;
327 if (CommonShuffleMode == Select && Vec2)
329 // If Vec2 was never used, we have a permutation of a single vector, otherwise
331 return Vec2 ? TargetTransformInfo::SK_PermuteTwoSrc
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Bitcode/Reader/ |
| H A D | BitcodeReader.cpp | 4161 Value *Vec1, *Vec2, *Mask; local
4163 popValue(Record, OpNum, NextValueNo, Vec1->getType(), Vec2))
4168 if (!Vec1->getType()->isVectorTy() || !Vec2->getType()->isVectorTy())
4170 I = new ShuffleVectorInst(Vec1, Vec2, Mask);
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| /freebsd-11-stable/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaOverload.cpp | 8542 Vec2 = CandidateTypes[1].vector_begin(),
8544 Vec2 != Vec2End; ++Vec2) {
8545 QualType LandR[2] = { *Vec1, *Vec2 };
8813 Vec2 = CandidateTypes[1].vector_begin(),
8815 Vec2 != Vec2End; ++Vec2) {
8817 ParamTypes[1] = *Vec2;
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 9296 // ScalarRes = EXTRACT_VECTOR_ELT ((vector-BINOP Vec1, Vec2), Idx)
9299 // Vec2Elt = EXTRACT_VECTOR_ELT(Vec2, Idx)
9779 SDValue Vec2 = Op2.getOperand(0); local
9804 if (Vec1 == Vec2 || Vec3 == Vec4)
9807 if (Vec1.getValueType() != MVT::v2f16 || Vec2.getValueType() != MVT::v2f16)
9810 if ((Vec1 == Vec3 && Vec2 == Vec4) ||
9811 (Vec1 == Vec4 && Vec2 == Vec3)) {
9812 return DAG.getNode(AMDGPUISD::FDOT2, SL, MVT::f32, Vec1, Vec2, FMAAcc,
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