Searched refs:ValueVT (Results 1 - 5 of 5) sorted by relevance
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGBuilder.cpp | 196 MVT PartVT, EVT ValueVT, const Value *V, 201 /// larger than ValueVT then AssertOp can be used to specify whether the extra 202 /// bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT 206 MVT PartVT, EVT ValueVT, const Value *V, 209 if (ValueVT.isVector()) 210 return getCopyFromPartsVector(DAG, DL, Parts, NumParts, PartVT, ValueVT, V, 219 if (ValueVT.isInteger()) { 221 unsigned ValueBits = ValueVT.getSizeInBits(); 228 ValueVT : EVT::getIntegerVT(*DAG.getContext(), RoundBits); 270 assert(ValueVT 204 getCopyFromParts(SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value *V, Optional<CallingConv::ID> CC = None, Optional<ISD::NodeType> AssertOp = None) argument 361 getCopyFromPartsVector(SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value *V, Optional<CallingConv::ID> CallConv) argument 507 EVT ValueVT = Val.getValueType(); local 666 EVT ValueVT = Val.getValueType(); local 818 EVT ValueVT = ValueVTs[Value]; local [all...] |
H A D | LegalizeTypesGeneric.cpp | 250 EVT ValueVT = LD->getValueType(0); local 251 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT); 276 if (TLI.hasBigEndianPartOrdering(ValueVT, DAG.getDataLayout())) 461 EVT ValueVT = St->getValue().getValueType(); local 462 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT); 474 if (TLI.hasBigEndianPartOrdering(ValueVT, DAG.getDataLayout()))
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H A D | FunctionLoweringInfo.cpp | 377 EVT ValueVT = ValueVTs[Value]; local 378 MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT); 380 unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT);
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H A D | LegalizeVectorTypes.cpp | 4537 EVT ValueVT = StVal.getValueType(); local 4539 ValueVT.getVectorElementType(),
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 149 EVT ValueVT = LD->getValueType(0); local 150 if (ValueVT == MVT::i64 && ExtType != ISD::NON_EXTLOAD) { 154 ValueVT = MVT::i32; 158 MachineSDNode *L = CurDAG->getMachineNode(Opcode, dl, ValueVT, 170 MachineSDNode *L = CurDAG->getMachineNode(Opcode, dl, ValueVT, MVT::Other, 472 EVT ValueVT = Value.getValueType(); local 519 if (ST->isTruncatingStore() && ValueVT.getSizeInBits() == 64) {
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