/freebsd-11-stable/contrib/ldns/ |
H A D | freebsd-configure.sh | 21 export CC=$(echo ".include <bsd.lib.mk>" | make -f /dev/stdin -VCC)
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/freebsd-11-stable/crypto/openssh/ |
H A D | freebsd-configure.sh | 26 export CC=$(echo ".include <bsd.lib.mk>" | make -f /dev/stdin -VCC)
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/freebsd-11-stable/contrib/unbound/ |
H A D | freebsd-configure.sh | 20 export CC=$(echo ".include <bsd.lib.mk>" | make -f /dev/stdin -VCC)
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/freebsd-11-stable/sys/dev/patm/ |
H A D | if_patm_ioctl.c | 77 * Open the VCC with the given parameters 86 patm_debug(sc, VCC, "Open VCC: %u.%u flags=%#x", arg->param.vpi, 166 patm_debug(sc, VCC, "Open VCC: asking Rx/Tx"); 194 patm_debug(sc, VCC, "Open VCC: opening"); 208 patm_debug(sc, VCC, "Open VCC: now open"); 212 * Try to close the given VCC [all...] |
H A D | if_patm_tx.c | 112 struct patm_vcc *vcc; /* the VCC of this PDU */ 263 patm_debug(sc, VCC, "%u buffers still on card", scd->num_on_card); 271 patm_debug(sc, VCC, "%u.%u TX closed", vcc->vcc.vpi, vcc->vcc.vci); 706 /* done with this VCC */ 725 patm_debug(sc, VCC, "%u buffers still on card", 749 patm_debug(sc, VCC, "ACRI=%04x CPS=%u", acri, cps); 768 patm_debug(sc, VCC, "idle %u", cid); 930 patm_debug(sc, VCC, "VBR: init_er=%u lacr=%u " 969 patm_debug(sc, VCC, "ABR: init_er=%u lacr=%u mcr=%u " 990 patm_debug(sc, VCC, "TC [all...] |
H A D | if_patm_rx.c | 104 * open the VCC 111 patm_debug(sc, VCC, "%u.%u RX opening", vcc->vcc.vpi, vcc->vcc.vci); 146 patm_debug(sc, VCC, "%u.%u RX closing", vcc->vcc.vpi, vcc->vcc.vci); 185 patm_debug(sc, VCC, "%u.%u RX finally closed", 218 patm_debug(sc, VCC, "%u.%u RX closed", vcc->vcc.vpi,
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/freebsd-11-stable/sys/dev/hatm/ |
H A D | if_hatm_ioctl.c | 93 * Try to open the given VCC. 102 DBG(sc, VCC, ("Open VCC: %u.%u flags=%#x", arg->param.vpi, 197 * VCC has been finally closed. 215 * Try to close the given VCC 224 DBG(sc, VCC, ("Close VCC: %u.%u", arg->vpi, arg->vci));
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIPeepholeSDWA.cpp | 914 // Make sure VCC or its subregs are dead before MI. 916 auto Liveness = MBB.computeRegisterLiveness(TRI, AMDGPU::VCC, MI, 25); 919 // Check if VCC is referenced in range of (MI,MISucc]. 922 if (I->modifiesRegister(AMDGPU::VCC, TRI)) 960 if (SDst && (SDst->getReg() != AMDGPU::VCC && 985 // FIXME: has SDWA but require handling of implicit VCC use
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H A D | SIOptimizeExecMaskingPreRA.cpp | 198 const unsigned CondReg = Wave32 ? AMDGPU::VCC_LO : AMDGPU::VCC; 270 // and s_and_b64 if VCC or just unused if any other register.
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H A D | SIInsertSkips.cpp | 262 I.addReg(AMDGPU::VCC, RegState::Define);
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H A D | SIInstrInfo.cpp | 583 if (DestReg == AMDGPU::VCC) { 585 BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), AMDGPU::VCC) 3053 // Set VCC operand with all flags from \p Orig, except for setting it as 3059 if (Use.isUse() && Use.getReg() == AMDGPU::VCC) { 3080 assert(((MI.getOperand(0).getReg() == AMDGPU::VCC) || 3133 MO.getReg() == AMDGPU::VCC || 3148 case AMDGPU::VCC: 3355 if (!Dst.isReg() || Dst.getReg() != AMDGPU::VCC) { 3356 ErrInfo = "Only VCC allowed as dst in SDWA instructions on VI"; 4032 // If there is an implicit SGPR use such as VCC us [all...] |
H A D | AMDGPUISelDAGToDAG.cpp | 1141 // V_DIV_FMAS implicitly reads VCC. 1142 SDValue VCC = CurDAG->getCopyToReg(CurDAG->getEntryNode(), SL, local 1151 Ops[8] = VCC; 1152 Ops[9] = VCC.getValue(1); 2096 SDValue VCC = CurDAG->getCopyToReg(N->getOperand(0), SL, CondReg, Cond); local 2099 VCC.getValue(0));
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H A D | SIRegisterInfo.cpp | 188 Reserved.set(AMDGPU::VCC); 1826 return isWave32 ? AMDGPU::VCC_LO : AMDGPU::VCC;
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H A D | SIFoldOperands.cpp | 242 auto Liveness = MBB->computeRegisterLiveness(&TRI, AMDGPU::VCC, MI, 16); 263 .addReg(AMDGPU::VCC, RegState::Kill);
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H A D | SIShrinkInstructions.cpp | 556 unsigned VCCReg = ST.isWave32() ? AMDGPU::VCC_LO : AMDGPU::VCC; 724 // VOPC instructions can only write to the VCC register. We can't 725 // force them to use VCC here, because this is only one register and 727 // VCC, e.g. S_AND_B64 (vcc = V_CMP_...), (vcc = V_CMP_...) 729 // So, instead of forcing the instruction to write to VCC, we provide 730 // a hint to the register allocator to use VCC and then we will run 731 // this pass again after RA and shrink it if it outputs to VCC.
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H A D | AMDGPUAsmPrinter.cpp | 727 case AMDGPU::VCC:
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H A D | GCNHazardRecognizer.cpp | 638 int WaitStatesNeeded = getWaitStatesSinceDef(AMDGPU::VCC, IsHazardDefFn,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
H A D | AMDGPUDisassembler.cpp | 431 // VOPC - insert VCC register as sdst 432 insertNamedMCOperand(MI, createRegOperand(AMDGPU::VCC), 639 // ToDo: unclear if s[100:104] is available on VI. Can we use VCC as SGPR in 643 // ToDo: unclear if s[96:104] is available on VI. Can we use VCC as SGPR in 649 // ToDo: unclear if s[88:104] is available on VI. Can we use VCC as SGPR in 1085 case 106: return createRegOperand(VCC); 1175 return createRegOperand(IsWave64 ? AMDGPU::VCC : AMDGPU::VCC_LO);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
H A D | SIMCCodeEmitter.cpp | 403 if (Reg != AMDGPU::VCC && Reg != AMDGPU::VCC_LO) {
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H A D | AMDGPUInstPrinter.cpp | 497 AMDGPU::VCC : AMDGPU::VCC_LO, O, MRI); 508 (Desc.hasImplicitDefOfPhysReg(AMDGPU::VCC) ||
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 1024 /// \param VCCUsed [in] Whether VCC special SGPR is reserved. 1942 .Case("vcc", AMDGPU::VCC) 2013 Reg = AMDGPU::VCC; 2725 case AMDGPU::VCC: 3387 // Check if VCC register matches wavefront size 3390 return (FB[AMDGPU::FeatureWavefrontSize64] && Reg == AMDGPU::VCC) || 6889 (Op.getReg() == AMDGPU::VCC || Op.getReg() == AMDGPU::VCC_LO)) { 6893 // Skip VCC only if we didn't skip it on previous iteration.
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 816 unsigned VCC = ARMVCC::None; local 821 VCC = VPTBlock.getVPTPred(); 851 VCCI = MI.insert(VCCI, MCOperand::createImm(VCC)); 853 if (VCC == ARMVCC::None) 864 } else if (VCC != ARMVCC::None) {
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 834 struct VCCOp VCC; member in union:__anon2168::ARMOperand::__anon2171 885 return VCC.Val; 3402 Op->VCC.Val = CC;
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