Searched refs:UNINDEXED (Results 1 - 9 of 9) sorted by relevance
| /freebsd-9.3-release/contrib/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 654 /// UNINDEXED "Normal" load / store. The effective address is already
679 UNINDEXED = 0, enumerator in enum:llvm::ISD::MemIndexedMode
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| H A D | SelectionDAGNodes.h | 1707 bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
1710 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
1889 Ld->getAddressingMode() == ISD::UNINDEXED;
1924 cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
1932 St->getAddressingMode() == ISD::UNINDEXED;
1951 cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
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| /freebsd-9.3-release/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 681 if (AM != ISD::UNINDEXED) {
821 if (AM != ISD::UNINDEXED) {
861 LD->getAddressingMode() != ISD::UNINDEXED) {
887 LD->getAddressingMode() != ISD::UNINDEXED) {
1041 LD->getAddressingMode() != ISD::UNINDEXED) {
1066 LD->getAddressingMode() != ISD::UNINDEXED) {
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| /freebsd-9.3-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 4538 bool Indexed = AM != ISD::UNINDEXED;
4573 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4582 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4592 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4602 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4656 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4666 ISD::UNINDEXED, false, VT, MMO);
4725 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4735 ISD::UNINDEXED, true, SVT, MMO);
6062 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MM
[all...] |
| H A D | LegalizeVectorTypes.cpp | 211 SDValue Result = DAG.getLoad(ISD::UNINDEXED,
833 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
840 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
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| H A D | LegalizeDAG.cpp | 307 assert(ST->getAddressingMode() == ISD::UNINDEXED &&
433 assert(LD->getAddressingMode() == ISD::UNINDEXED &&
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| H A D | DAGCombiner.cpp | 7136 ISD::MemIndexedMode AM = ISD::UNINDEXED;
7370 ISD::MemIndexedMode AM = ISD::UNINDEXED;
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| /freebsd-9.3-release/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 1451 if (AM == ISD::UNINDEXED)
1524 if (AM == ISD::UNINDEXED)
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| /freebsd-9.3-release/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 411 LD->getAddressingMode() != ISD::UNINDEXED ||
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