1207618Srdivacky//===-- llvm/CodeGen/ISDOpcodes.h - CodeGen opcodes -------------*- C++ -*-===// 2207618Srdivacky// 3207618Srdivacky// The LLVM Compiler Infrastructure 4207618Srdivacky// 5207618Srdivacky// This file is distributed under the University of Illinois Open Source 6207618Srdivacky// License. See LICENSE.TXT for details. 7207618Srdivacky// 8207618Srdivacky//===----------------------------------------------------------------------===// 9207618Srdivacky// 10207618Srdivacky// This file declares codegen opcodes and related utilities. 11207618Srdivacky// 12207618Srdivacky//===----------------------------------------------------------------------===// 13207618Srdivacky 14207618Srdivacky#ifndef LLVM_CODEGEN_ISDOPCODES_H 15207618Srdivacky#define LLVM_CODEGEN_ISDOPCODES_H 16207618Srdivacky 17207618Srdivackynamespace llvm { 18207618Srdivacky 19207618Srdivacky/// ISD namespace - This namespace contains an enum which represents all of the 20207618Srdivacky/// SelectionDAG node types and value types. 21207618Srdivacky/// 22207618Srdivackynamespace ISD { 23207618Srdivacky 24207618Srdivacky //===--------------------------------------------------------------------===// 25207618Srdivacky /// ISD::NodeType enum - This enum defines the target-independent operators 26207618Srdivacky /// for a SelectionDAG. 27207618Srdivacky /// 28207618Srdivacky /// Targets may also define target-dependent operator codes for SDNodes. For 29207618Srdivacky /// example, on x86, these are the enum values in the X86ISD namespace. 30207618Srdivacky /// Targets should aim to use target-independent operators to model their 31207618Srdivacky /// instruction sets as much as possible, and only use target-dependent 32207618Srdivacky /// operators when they have special requirements. 33207618Srdivacky /// 34207618Srdivacky /// Finally, during and after selection proper, SNodes may use special 35207618Srdivacky /// operator codes that correspond directly with MachineInstr opcodes. These 36207618Srdivacky /// are used to represent selected instructions. See the isMachineOpcode() 37207618Srdivacky /// and getMachineOpcode() member functions of SDNode. 38207618Srdivacky /// 39207618Srdivacky enum NodeType { 40245431Sdim /// DELETED_NODE - This is an illegal value that is used to catch 41245431Sdim /// errors. This opcode is not a legal opcode for any node. 42207618Srdivacky DELETED_NODE, 43207618Srdivacky 44245431Sdim /// EntryToken - This is the marker used to indicate the start of a region. 45207618Srdivacky EntryToken, 46207618Srdivacky 47245431Sdim /// TokenFactor - This node takes multiple tokens as input and produces a 48245431Sdim /// single token result. This is used to represent the fact that the operand 49245431Sdim /// operators are independent of each other. 50207618Srdivacky TokenFactor, 51207618Srdivacky 52245431Sdim /// AssertSext, AssertZext - These nodes record if a register contains a 53245431Sdim /// value that has already been zero or sign extended from a narrower type. 54245431Sdim /// These nodes take two operands. The first is the node that has already 55245431Sdim /// been extended, and the second is a value type node indicating the width 56245431Sdim /// of the extension 57207618Srdivacky AssertSext, AssertZext, 58207618Srdivacky 59245431Sdim /// Various leaf nodes. 60235633Sdim BasicBlock, VALUETYPE, CONDCODE, Register, RegisterMask, 61207618Srdivacky Constant, ConstantFP, 62207618Srdivacky GlobalAddress, GlobalTLSAddress, FrameIndex, 63207618Srdivacky JumpTable, ConstantPool, ExternalSymbol, BlockAddress, 64207618Srdivacky 65245431Sdim /// The address of the GOT 66207618Srdivacky GLOBAL_OFFSET_TABLE, 67207618Srdivacky 68245431Sdim /// FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and 69245431Sdim /// llvm.returnaddress on the DAG. These nodes take one operand, the index 70245431Sdim /// of the frame or return address to return. An index of zero corresponds 71245431Sdim /// to the current function's frame or return address, an index of one to 72245431Sdim /// the parent's frame or return address, and so on. 73207618Srdivacky FRAMEADDR, RETURNADDR, 74207618Srdivacky 75245431Sdim /// FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to 76245431Sdim /// first (possible) on-stack argument. This is needed for correct stack 77245431Sdim /// adjustment during unwind. 78207618Srdivacky FRAME_TO_ARGS_OFFSET, 79207618Srdivacky 80245431Sdim /// OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 81245431Sdim /// 'eh_return' gcc dwarf builtin, which is used to return from 82245431Sdim /// exception. The general meaning is: adjust stack by OFFSET and pass 83245431Sdim /// execution to HANDLER. Many platform-related details also :) 84207618Srdivacky EH_RETURN, 85207618Srdivacky 86245431Sdim /// RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) 87245431Sdim /// This corresponds to the eh.sjlj.setjmp intrinsic. 88245431Sdim /// It takes an input chain and a pointer to the jump buffer as inputs 89245431Sdim /// and returns an outchain. 90208599Srdivacky EH_SJLJ_SETJMP, 91208599Srdivacky 92245431Sdim /// OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) 93245431Sdim /// This corresponds to the eh.sjlj.longjmp intrinsic. 94245431Sdim /// It takes an input chain and a pointer to the jump buffer as inputs 95245431Sdim /// and returns an outchain. 96208599Srdivacky EH_SJLJ_LONGJMP, 97208599Srdivacky 98245431Sdim /// TargetConstant* - Like Constant*, but the DAG does not do any folding, 99245431Sdim /// simplification, or lowering of the constant. They are used for constants 100245431Sdim /// which are known to fit in the immediate fields of their users, or for 101245431Sdim /// carrying magic numbers which are not values which need to be 102245431Sdim /// materialized in registers. 103207618Srdivacky TargetConstant, 104207618Srdivacky TargetConstantFP, 105207618Srdivacky 106245431Sdim /// TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or 107245431Sdim /// anything else with this node, and this is valid in the target-specific 108245431Sdim /// dag, turning into a GlobalAddress operand. 109207618Srdivacky TargetGlobalAddress, 110207618Srdivacky TargetGlobalTLSAddress, 111207618Srdivacky TargetFrameIndex, 112207618Srdivacky TargetJumpTable, 113207618Srdivacky TargetConstantPool, 114207618Srdivacky TargetExternalSymbol, 115207618Srdivacky TargetBlockAddress, 116207618Srdivacky 117245431Sdim /// TargetIndex - Like a constant pool entry, but with completely 118245431Sdim /// target-dependent semantics. Holds target flags, a 32-bit index, and a 119245431Sdim /// 64-bit index. Targets can use this however they like. 120245431Sdim TargetIndex, 121245431Sdim 122207618Srdivacky /// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) 123207618Srdivacky /// This node represents a target intrinsic function with no side effects. 124207618Srdivacky /// The first operand is the ID number of the intrinsic from the 125207618Srdivacky /// llvm::Intrinsic namespace. The operands to the intrinsic follow. The 126210299Sed /// node returns the result of the intrinsic. 127207618Srdivacky INTRINSIC_WO_CHAIN, 128207618Srdivacky 129207618Srdivacky /// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) 130207618Srdivacky /// This node represents a target intrinsic function with side effects that 131207618Srdivacky /// returns a result. The first operand is a chain pointer. The second is 132207618Srdivacky /// the ID number of the intrinsic from the llvm::Intrinsic namespace. The 133207618Srdivacky /// operands to the intrinsic follow. The node has two results, the result 134207618Srdivacky /// of the intrinsic and an output chain. 135207618Srdivacky INTRINSIC_W_CHAIN, 136207618Srdivacky 137207618Srdivacky /// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) 138207618Srdivacky /// This node represents a target intrinsic function with side effects that 139207618Srdivacky /// does not return a result. The first operand is a chain pointer. The 140207618Srdivacky /// second is the ID number of the intrinsic from the llvm::Intrinsic 141207618Srdivacky /// namespace. The operands to the intrinsic follow. 142207618Srdivacky INTRINSIC_VOID, 143207618Srdivacky 144245431Sdim /// CopyToReg - This node has three operands: a chain, a register number to 145245431Sdim /// set to this value, and a value. 146207618Srdivacky CopyToReg, 147207618Srdivacky 148245431Sdim /// CopyFromReg - This node indicates that the input value is a virtual or 149245431Sdim /// physical register that is defined outside of the scope of this 150245431Sdim /// SelectionDAG. The register is available from the RegisterSDNode object. 151207618Srdivacky CopyFromReg, 152207618Srdivacky 153245431Sdim /// UNDEF - An undefined node. 154207618Srdivacky UNDEF, 155207618Srdivacky 156245431Sdim /// EXTRACT_ELEMENT - This is used to get the lower or upper (determined by 157245431Sdim /// a Constant, which is required to be operand #1) half of the integer or 158245431Sdim /// float value specified as operand #0. This is only for use before 159245431Sdim /// legalization, for values that will be broken into multiple registers. 160207618Srdivacky EXTRACT_ELEMENT, 161207618Srdivacky 162245431Sdim /// BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways. 163245431Sdim /// Given two values of the same integer value type, this produces a value 164245431Sdim /// twice as big. Like EXTRACT_ELEMENT, this can only be used before 165245431Sdim /// legalization. 166207618Srdivacky BUILD_PAIR, 167207618Srdivacky 168245431Sdim /// MERGE_VALUES - This node takes multiple discrete operands and returns 169245431Sdim /// them all as its individual results. This nodes has exactly the same 170245431Sdim /// number of inputs and outputs. This node is useful for some pieces of the 171245431Sdim /// code generator that want to think about a single node with multiple 172245431Sdim /// results, not multiple nodes. 173207618Srdivacky MERGE_VALUES, 174207618Srdivacky 175245431Sdim /// Simple integer binary arithmetic operators. 176207618Srdivacky ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, 177207618Srdivacky 178245431Sdim /// SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing 179245431Sdim /// a signed/unsigned value of type i[2*N], and return the full value as 180245431Sdim /// two results, each of type iN. 181207618Srdivacky SMUL_LOHI, UMUL_LOHI, 182207618Srdivacky 183245431Sdim /// SDIVREM/UDIVREM - Divide two integers and produce both a quotient and 184245431Sdim /// remainder result. 185207618Srdivacky SDIVREM, UDIVREM, 186207618Srdivacky 187245431Sdim /// CARRY_FALSE - This node is used when folding other nodes, 188245431Sdim /// like ADDC/SUBC, which indicate the carry result is always false. 189207618Srdivacky CARRY_FALSE, 190207618Srdivacky 191245431Sdim /// Carry-setting nodes for multiple precision addition and subtraction. 192245431Sdim /// These nodes take two operands of the same value type, and produce two 193245431Sdim /// results. The first result is the normal add or sub result, the second 194245431Sdim /// result is the carry flag result. 195207618Srdivacky ADDC, SUBC, 196207618Srdivacky 197245431Sdim /// Carry-using nodes for multiple precision addition and subtraction. These 198245431Sdim /// nodes take three operands: The first two are the normal lhs and rhs to 199245431Sdim /// the add or sub, and the third is the input carry flag. These nodes 200245431Sdim /// produce two results; the normal result of the add or sub, and the output 201245431Sdim /// carry flag. These nodes both read and write a carry flag to allow them 202245431Sdim /// to them to be chained together for add and sub of arbitrarily large 203245431Sdim /// values. 204207618Srdivacky ADDE, SUBE, 205207618Srdivacky 206245431Sdim /// RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition. 207245431Sdim /// These nodes take two operands: the normal LHS and RHS to the add. They 208245431Sdim /// produce two results: the normal result of the add, and a boolean that 209245431Sdim /// indicates if an overflow occurred (*not* a flag, because it may be store 210245431Sdim /// to memory, etc.). If the type of the boolean is not i1 then the high 211245431Sdim /// bits conform to getBooleanContents. 212245431Sdim /// These nodes are generated from llvm.[su]add.with.overflow intrinsics. 213207618Srdivacky SADDO, UADDO, 214207618Srdivacky 215245431Sdim /// Same for subtraction. 216207618Srdivacky SSUBO, USUBO, 217207618Srdivacky 218245431Sdim /// Same for multiplication. 219207618Srdivacky SMULO, UMULO, 220207618Srdivacky 221245431Sdim /// Simple binary floating point operators. 222224145Sdim FADD, FSUB, FMUL, FMA, FDIV, FREM, 223207618Srdivacky 224245431Sdim /// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This 225245431Sdim /// DAG node does not require that X and Y have the same type, just that the 226245431Sdim /// are both floating point. X and the result must have the same type. 227245431Sdim /// FCOPYSIGN(f32, f64) is allowed. 228207618Srdivacky FCOPYSIGN, 229207618Srdivacky 230245431Sdim /// INT = FGETSIGN(FP) - Return the sign bit of the specified floating point 231245431Sdim /// value as an integer 0/1 value. 232207618Srdivacky FGETSIGN, 233207618Srdivacky 234207618Srdivacky /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the 235207618Srdivacky /// specified, possibly variable, elements. The number of elements is 236207618Srdivacky /// required to be a power of two. The types of the operands must all be 237207618Srdivacky /// the same and must match the vector element type, except that integer 238207618Srdivacky /// types are allowed to be larger than the element type, in which case 239207618Srdivacky /// the operands are implicitly truncated. 240207618Srdivacky BUILD_VECTOR, 241207618Srdivacky 242207618Srdivacky /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element 243207618Srdivacky /// at IDX replaced with VAL. If the type of VAL is larger than the vector 244207618Srdivacky /// element type then VAL is truncated before replacement. 245207618Srdivacky INSERT_VECTOR_ELT, 246207618Srdivacky 247207618Srdivacky /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR 248207618Srdivacky /// identified by the (potentially variable) element number IDX. If the 249207618Srdivacky /// return type is an integer type larger than the element type of the 250207618Srdivacky /// vector, the result is extended to the width of the return type. 251207618Srdivacky EXTRACT_VECTOR_ELT, 252207618Srdivacky 253207618Srdivacky /// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of 254207618Srdivacky /// vector type with the same length and element type, this produces a 255207618Srdivacky /// concatenated vector result value, with length equal to the sum of the 256207618Srdivacky /// lengths of the input vectors. 257207618Srdivacky CONCAT_VECTORS, 258207618Srdivacky 259218893Sdim /// INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector 260218893Sdim /// with VECTOR2 inserted into VECTOR1 at the (potentially 261218893Sdim /// variable) element number IDX, which must be a multiple of the 262218893Sdim /// VECTOR2 vector length. The elements of VECTOR1 starting at 263218893Sdim /// IDX are overwritten with VECTOR2. Elements IDX through 264218893Sdim /// vector_length(VECTOR2) must be valid VECTOR1 indices. 265218893Sdim INSERT_SUBVECTOR, 266218893Sdim 267207618Srdivacky /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an 268218893Sdim /// vector value) starting with the element number IDX, which must be a 269218893Sdim /// constant multiple of the result vector length. 270207618Srdivacky EXTRACT_SUBVECTOR, 271207618Srdivacky 272218893Sdim /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as 273207618Srdivacky /// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int 274207618Srdivacky /// values that indicate which value (or undef) each result element will 275218893Sdim /// get. These constant ints are accessible through the 276218893Sdim /// ShuffleVectorSDNode class. This is quite similar to the Altivec 277207618Srdivacky /// 'vperm' instruction, except that the indices must be constants and are 278207618Srdivacky /// in terms of the element size of VEC1/VEC2, not in terms of bytes. 279207618Srdivacky VECTOR_SHUFFLE, 280207618Srdivacky 281207618Srdivacky /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a 282207618Srdivacky /// scalar value into element 0 of the resultant vector type. The top 283207618Srdivacky /// elements 1 to N-1 of the N-element vector are undefined. The type 284207618Srdivacky /// of the operand must match the vector element type, except when they 285207618Srdivacky /// are integer types. In this case the operand is allowed to be wider 286207618Srdivacky /// than the vector element type, and is implicitly truncated to it. 287207618Srdivacky SCALAR_TO_VECTOR, 288207618Srdivacky 289245431Sdim /// MULHU/MULHS - Multiply high - Multiply two integers of type iN, 290245431Sdim /// producing an unsigned/signed value of type i[2*N], then return the top 291245431Sdim /// part. 292207618Srdivacky MULHU, MULHS, 293207618Srdivacky 294218893Sdim /// Bitwise operators - logical and, logical or, logical xor. 295218893Sdim AND, OR, XOR, 296245431Sdim 297218893Sdim /// Shift and rotation operations. After legalization, the type of the 298218893Sdim /// shift amount is known to be TLI.getShiftAmountTy(). Before legalization 299218893Sdim /// the shift amount can be any type, but care must be taken to ensure it is 300218893Sdim /// large enough. TLI.getShiftAmountTy() is i8 on some targets, but before 301218893Sdim /// legalization, types like i1024 can occur and i8 doesn't have enough bits 302252723Sdim /// to represent the shift amount. 303252723Sdim /// When the 1st operand is a vector, the shift amount must be in the same 304252723Sdim /// type. (TLI.getShiftAmountTy() will return the same type when the input 305252723Sdim /// type is a vector.) 306218893Sdim SHL, SRA, SRL, ROTL, ROTR, 307207618Srdivacky 308218893Sdim /// Byte Swap and Counting operators. 309218893Sdim BSWAP, CTTZ, CTLZ, CTPOP, 310207618Srdivacky 311235633Sdim /// Bit counting operators with an undefined result for zero inputs. 312235633Sdim CTTZ_ZERO_UNDEF, CTLZ_ZERO_UNDEF, 313235633Sdim 314245431Sdim /// Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not 315245431Sdim /// i1 then the high bits must conform to getBooleanContents. 316207618Srdivacky SELECT, 317207618Srdivacky 318245431Sdim /// Select with a vector condition (op #0) and two vector operands (ops #1 319245431Sdim /// and #2), returning a vector result. All vectors have the same length. 320245431Sdim /// Much like the scalar select and setcc, each bit in the condition selects 321245431Sdim /// whether the corresponding result element is taken from op #1 or op #2. 322245431Sdim /// At first, the VSELECT condition is of vXi1 type. Later, targets may 323245431Sdim /// change the condition type in order to match the VSELECT node using a 324245431Sdim /// pattern. The condition follows the BooleanContent format of the target. 325226890Sdim VSELECT, 326226890Sdim 327245431Sdim /// Select with condition operator - This selects between a true value and 328245431Sdim /// a false value (ops #2 and #3) based on the boolean result of comparing 329245431Sdim /// the lhs and rhs (ops #0 and #1) of a conditional expression with the 330245431Sdim /// condition code in op #4, a CondCodeSDNode. 331207618Srdivacky SELECT_CC, 332207618Srdivacky 333245431Sdim /// SetCC operator - This evaluates to a true value iff the condition is 334245431Sdim /// true. If the result value type is not i1 then the high bits conform 335245431Sdim /// to getBooleanContents. The operands to this are the left and right 336245431Sdim /// operands to compare (ops #0, and #1) and the condition code to compare 337245431Sdim /// them with (op #2) as a CondCodeSDNode. If the operands are vector types 338245431Sdim /// then the result type must also be a vector type. 339207618Srdivacky SETCC, 340207618Srdivacky 341245431Sdim /// SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded 342245431Sdim /// integer shift operations, just like ADD/SUB_PARTS. The operation 343245431Sdim /// ordering is: 344245431Sdim /// [Lo,Hi] = op [LoLHS,HiLHS], Amt 345207618Srdivacky SHL_PARTS, SRA_PARTS, SRL_PARTS, 346207618Srdivacky 347245431Sdim /// Conversion operators. These are all single input single output 348245431Sdim /// operations. For all of these, the result type must be strictly 349245431Sdim /// wider or narrower (depending on the operation) than the source 350245431Sdim /// type. 351207618Srdivacky 352245431Sdim /// SIGN_EXTEND - Used for integer types, replicating the sign bit 353245431Sdim /// into new bits. 354207618Srdivacky SIGN_EXTEND, 355207618Srdivacky 356245431Sdim /// ZERO_EXTEND - Used for integer types, zeroing the new bits. 357207618Srdivacky ZERO_EXTEND, 358207618Srdivacky 359245431Sdim /// ANY_EXTEND - Used for integer types. The high bits are undefined. 360207618Srdivacky ANY_EXTEND, 361207618Srdivacky 362245431Sdim /// TRUNCATE - Completely drop the high bits. 363207618Srdivacky TRUNCATE, 364207618Srdivacky 365245431Sdim /// [SU]INT_TO_FP - These operators convert integers (whose interpreted sign 366245431Sdim /// depends on the first letter) to floating point. 367207618Srdivacky SINT_TO_FP, 368207618Srdivacky UINT_TO_FP, 369207618Srdivacky 370245431Sdim /// SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to 371245431Sdim /// sign extend a small value in a large integer register (e.g. sign 372245431Sdim /// extending the low 8 bits of a 32-bit register to fill the top 24 bits 373245431Sdim /// with the 7th bit). The size of the smaller type is indicated by the 1th 374245431Sdim /// operand, a ValueType node. 375207618Srdivacky SIGN_EXTEND_INREG, 376207618Srdivacky 377207618Srdivacky /// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned 378207618Srdivacky /// integer. 379207618Srdivacky FP_TO_SINT, 380207618Srdivacky FP_TO_UINT, 381207618Srdivacky 382207618Srdivacky /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type 383207618Srdivacky /// down to the precision of the destination VT. TRUNC is a flag, which is 384207618Srdivacky /// always an integer that is zero or one. If TRUNC is 0, this is a 385207618Srdivacky /// normal rounding, if it is 1, this FP_ROUND is known to not change the 386207618Srdivacky /// value of Y. 387207618Srdivacky /// 388207618Srdivacky /// The TRUNC = 1 case is used in cases where we know that the value will 389207618Srdivacky /// not be modified by the node, because Y is not using any of the extra 390207618Srdivacky /// precision of source type. This allows certain transformations like 391207618Srdivacky /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for 392207618Srdivacky /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed. 393207618Srdivacky FP_ROUND, 394207618Srdivacky 395245431Sdim /// FLT_ROUNDS_ - Returns current rounding mode: 396245431Sdim /// -1 Undefined 397245431Sdim /// 0 Round to 0 398245431Sdim /// 1 Round to nearest 399245431Sdim /// 2 Round to +inf 400245431Sdim /// 3 Round to -inf 401207618Srdivacky FLT_ROUNDS_, 402207618Srdivacky 403207618Srdivacky /// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and 404207618Srdivacky /// rounds it to a floating point value. It then promotes it and returns it 405207618Srdivacky /// in a register of the same size. This operation effectively just 406207618Srdivacky /// discards excess precision. The type to round down to is specified by 407207618Srdivacky /// the VT operand, a VTSDNode. 408207618Srdivacky FP_ROUND_INREG, 409207618Srdivacky 410207618Srdivacky /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type. 411207618Srdivacky FP_EXTEND, 412207618Srdivacky 413245431Sdim /// BITCAST - This operator converts between integer, vector and FP 414245431Sdim /// values, as if the value was stored to memory with one type and loaded 415245431Sdim /// from the same address with the other type (or equivalently for vector 416245431Sdim /// format conversions, etc). The source and result are required to have 417245431Sdim /// the same bit size (e.g. f32 <-> i32). This can also be used for 418245431Sdim /// int-to-int or fp-to-fp conversions, but that is a noop, deleted by 419245431Sdim /// getNode(). 420218893Sdim BITCAST, 421207618Srdivacky 422263509Sdim /// ADDRSPACECAST - This operator converts between pointers of different 423263509Sdim /// address spaces. 424263509Sdim ADDRSPACECAST, 425263509Sdim 426245431Sdim /// CONVERT_RNDSAT - This operator is used to support various conversions 427245431Sdim /// between various types (float, signed, unsigned and vectors of those 428245431Sdim /// types) with rounding and saturation. NOTE: Avoid using this operator as 429245431Sdim /// most target don't support it and the operator might be removed in the 430245431Sdim /// future. It takes the following arguments: 431245431Sdim /// 0) value 432245431Sdim /// 1) dest type (type to convert to) 433245431Sdim /// 2) src type (type to convert from) 434245431Sdim /// 3) rounding imm 435245431Sdim /// 4) saturation imm 436245431Sdim /// 5) ISD::CvtCode indicating the type of conversion to do 437207618Srdivacky CONVERT_RNDSAT, 438207618Srdivacky 439245431Sdim /// FP16_TO_FP32, FP32_TO_FP16 - These operators are used to perform 440245431Sdim /// promotions and truncation for half-precision (16 bit) floating 441245431Sdim /// numbers. We need special nodes since FP16 is a storage-only type with 442245431Sdim /// special semantics of operations. 443207618Srdivacky FP16_TO_FP32, FP32_TO_FP16, 444207618Srdivacky 445245431Sdim /// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, 446245431Sdim /// FLOG, FLOG2, FLOG10, FEXP, FEXP2, 447263509Sdim /// FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR - Perform various unary 448245431Sdim /// floating point operations. These are inspired by libm. 449207618Srdivacky FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, 450207618Srdivacky FLOG, FLOG2, FLOG10, FEXP, FEXP2, 451263509Sdim FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, 452252723Sdim 453252723Sdim /// FSINCOS - Compute both fsin and fcos as a single operation. 454252723Sdim FSINCOS, 455207618Srdivacky 456245431Sdim /// LOAD and STORE have token chains as their first operand, then the same 457245431Sdim /// operands as an LLVM load/store instruction, then an offset node that 458245431Sdim /// is added / subtracted from the base pointer to form the address (for 459245431Sdim /// indexed memory ops). 460207618Srdivacky LOAD, STORE, 461207618Srdivacky 462245431Sdim /// DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned 463245431Sdim /// to a specified boundary. This node always has two return values: a new 464245431Sdim /// stack pointer value and a chain. The first operand is the token chain, 465245431Sdim /// the second is the number of bytes to allocate, and the third is the 466245431Sdim /// alignment boundary. The size is guaranteed to be a multiple of the 467245431Sdim /// stack alignment, and the alignment is guaranteed to be bigger than the 468245431Sdim /// stack alignment (if required) or 0 to get standard stack alignment. 469207618Srdivacky DYNAMIC_STACKALLOC, 470207618Srdivacky 471245431Sdim /// Control flow instructions. These all have token chains. 472207618Srdivacky 473245431Sdim /// BR - Unconditional branch. The first operand is the chain 474245431Sdim /// operand, the second is the MBB to branch to. 475207618Srdivacky BR, 476207618Srdivacky 477245431Sdim /// BRIND - Indirect branch. The first operand is the chain, the second 478245431Sdim /// is the value to branch to, which must be of the same type as the 479245431Sdim /// target's pointer type. 480207618Srdivacky BRIND, 481207618Srdivacky 482245431Sdim /// BR_JT - Jumptable branch. The first operand is the chain, the second 483245431Sdim /// is the jumptable index, the last one is the jumptable entry index. 484207618Srdivacky BR_JT, 485207618Srdivacky 486245431Sdim /// BRCOND - Conditional branch. The first operand is the chain, the 487245431Sdim /// second is the condition, the third is the block to branch to if the 488245431Sdim /// condition is true. If the type of the condition is not i1, then the 489245431Sdim /// high bits must conform to getBooleanContents. 490207618Srdivacky BRCOND, 491207618Srdivacky 492245431Sdim /// BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in 493245431Sdim /// that the condition is represented as condition code, and two nodes to 494245431Sdim /// compare, rather than as a combined SetCC node. The operands in order 495245431Sdim /// are chain, cc, lhs, rhs, block to branch to if condition is true. 496207618Srdivacky BR_CC, 497207618Srdivacky 498245431Sdim /// INLINEASM - Represents an inline asm block. This node always has two 499245431Sdim /// return values: a chain and a flag result. The inputs are as follows: 500245431Sdim /// Operand #0 : Input chain. 501245431Sdim /// Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string. 502245431Sdim /// Operand #2 : a MDNodeSDNode with the !srcloc metadata. 503245431Sdim /// Operand #3 : HasSideEffect, IsAlignStack bits. 504245431Sdim /// After this, it is followed by a list of operands with this format: 505245431Sdim /// ConstantSDNode: Flags that encode whether it is a mem or not, the 506245431Sdim /// of operands that follow, etc. See InlineAsm.h. 507245431Sdim /// ... however many operands ... 508245431Sdim /// Operand #last: Optional, an incoming flag. 509245431Sdim /// 510245431Sdim /// The variable width operands are required to represent target addressing 511245431Sdim /// modes as a single "operand", even though they may have multiple 512245431Sdim /// SDOperands. 513207618Srdivacky INLINEASM, 514207618Srdivacky 515245431Sdim /// EH_LABEL - Represents a label in mid basic block used to track 516245431Sdim /// locations needed for debug and exception handling tables. These nodes 517245431Sdim /// take a chain as input and return a chain. 518207618Srdivacky EH_LABEL, 519207618Srdivacky 520245431Sdim /// STACKSAVE - STACKSAVE has one operand, an input chain. It produces a 521245431Sdim /// value, the same type as the pointer type for the system, and an output 522245431Sdim /// chain. 523207618Srdivacky STACKSAVE, 524207618Srdivacky 525245431Sdim /// STACKRESTORE has two operands, an input chain and a pointer to restore 526245431Sdim /// to it returns an output chain. 527207618Srdivacky STACKRESTORE, 528207618Srdivacky 529245431Sdim /// CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end 530245431Sdim /// of a call sequence, and carry arbitrary information that target might 531245431Sdim /// want to know. The first operand is a chain, the rest are specified by 532245431Sdim /// the target and not touched by the DAG optimizers. 533245431Sdim /// CALLSEQ_START..CALLSEQ_END pairs may not be nested. 534207618Srdivacky CALLSEQ_START, // Beginning of a call sequence 535207618Srdivacky CALLSEQ_END, // End of a call sequence 536207618Srdivacky 537245431Sdim /// VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, 538245431Sdim /// and the alignment. It returns a pair of values: the vaarg value and a 539245431Sdim /// new chain. 540207618Srdivacky VAARG, 541207618Srdivacky 542245431Sdim /// VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, 543245431Sdim /// a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the 544245431Sdim /// source. 545207618Srdivacky VACOPY, 546207618Srdivacky 547245431Sdim /// VAEND, VASTART - VAEND and VASTART have three operands: an input chain, 548245431Sdim /// pointer, and a SRCVALUE. 549207618Srdivacky VAEND, VASTART, 550207618Srdivacky 551245431Sdim /// SRCVALUE - This is a node type that holds a Value* that is used to 552245431Sdim /// make reference to a value in the LLVM IR. 553207618Srdivacky SRCVALUE, 554218893Sdim 555245431Sdim /// MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to 556245431Sdim /// reference metadata in the IR. 557207618Srdivacky MDNODE_SDNODE, 558207618Srdivacky 559245431Sdim /// PCMARKER - This corresponds to the pcmarker intrinsic. 560207618Srdivacky PCMARKER, 561207618Srdivacky 562245431Sdim /// READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic. 563245431Sdim /// The only operand is a chain and a value and a chain are produced. The 564245431Sdim /// value is the contents of the architecture specific cycle counter like 565245431Sdim /// register (or other high accuracy low latency clock source) 566207618Srdivacky READCYCLECOUNTER, 567207618Srdivacky 568245431Sdim /// HANDLENODE node - Used as a handle for various purposes. 569207618Srdivacky HANDLENODE, 570207618Srdivacky 571245431Sdim /// INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic. It 572245431Sdim /// takes as input a token chain, the pointer to the trampoline, the pointer 573245431Sdim /// to the nested function, the pointer to pass for the 'nest' parameter, a 574245431Sdim /// SRCVALUE for the trampoline and another for the nested function 575245431Sdim /// (allowing targets to access the original Function*). 576245431Sdim /// It produces a token chain as output. 577226890Sdim INIT_TRAMPOLINE, 578207618Srdivacky 579245431Sdim /// ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic. 580245431Sdim /// It takes a pointer to the trampoline and produces a (possibly) new 581245431Sdim /// pointer to the same trampoline with platform-specific adjustments 582245431Sdim /// applied. The pointer it returns points to an executable block of code. 583226890Sdim ADJUST_TRAMPOLINE, 584226890Sdim 585245431Sdim /// TRAP - Trapping instruction 586207618Srdivacky TRAP, 587207618Srdivacky 588245431Sdim /// DEBUGTRAP - Trap intended to get the attention of a debugger. 589245431Sdim DEBUGTRAP, 590245431Sdim 591245431Sdim /// PREFETCH - This corresponds to a prefetch intrinsic. The first operand 592245431Sdim /// is the chain. The other operands are the address to prefetch, 593245431Sdim /// read / write specifier, locality specifier and instruction / data cache 594245431Sdim /// specifier. 595207618Srdivacky PREFETCH, 596207618Srdivacky 597245431Sdim /// OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) 598245431Sdim /// This corresponds to the fence instruction. It takes an input chain, and 599245431Sdim /// two integer constants: an AtomicOrdering and a SynchronizationScope. 600226890Sdim ATOMIC_FENCE, 601226890Sdim 602245431Sdim /// Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) 603245431Sdim /// This corresponds to "load atomic" instruction. 604226890Sdim ATOMIC_LOAD, 605226890Sdim 606245431Sdim /// OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr, val) 607245431Sdim /// This corresponds to "store atomic" instruction. 608226890Sdim ATOMIC_STORE, 609226890Sdim 610245431Sdim /// Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) 611263509Sdim /// For double-word atomic operations: 612263509Sdim /// ValLo, ValHi, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmpLo, cmpHi, 613263509Sdim /// swapLo, swapHi) 614245431Sdim /// This corresponds to the cmpxchg instruction. 615207618Srdivacky ATOMIC_CMP_SWAP, 616207618Srdivacky 617245431Sdim /// Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) 618245431Sdim /// Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) 619263509Sdim /// For double-word atomic operations: 620263509Sdim /// ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) 621263509Sdim /// ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) 622245431Sdim /// These correspond to the atomicrmw instruction. 623207618Srdivacky ATOMIC_SWAP, 624207618Srdivacky ATOMIC_LOAD_ADD, 625207618Srdivacky ATOMIC_LOAD_SUB, 626207618Srdivacky ATOMIC_LOAD_AND, 627207618Srdivacky ATOMIC_LOAD_OR, 628207618Srdivacky ATOMIC_LOAD_XOR, 629207618Srdivacky ATOMIC_LOAD_NAND, 630207618Srdivacky ATOMIC_LOAD_MIN, 631207618Srdivacky ATOMIC_LOAD_MAX, 632207618Srdivacky ATOMIC_LOAD_UMIN, 633207618Srdivacky ATOMIC_LOAD_UMAX, 634207618Srdivacky 635245431Sdim /// This corresponds to the llvm.lifetime.* intrinsics. The first operand 636245431Sdim /// is the chain and the second operand is the alloca pointer. 637245431Sdim LIFETIME_START, LIFETIME_END, 638245431Sdim 639207618Srdivacky /// BUILTIN_OP_END - This must be the last enum value in this list. 640207618Srdivacky /// The target-specific pre-isel opcode values start here. 641207618Srdivacky BUILTIN_OP_END 642207618Srdivacky }; 643207618Srdivacky 644207618Srdivacky /// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations 645207618Srdivacky /// which do not reference a specific memory location should be less than 646207618Srdivacky /// this value. Those that do must not be less than this value, and can 647207618Srdivacky /// be used with SelectionDAG::getMemIntrinsicNode. 648263509Sdim static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+180; 649207618Srdivacky 650207618Srdivacky //===--------------------------------------------------------------------===// 651207618Srdivacky /// MemIndexedMode enum - This enum defines the load / store indexed 652207618Srdivacky /// addressing modes. 653207618Srdivacky /// 654207618Srdivacky /// UNINDEXED "Normal" load / store. The effective address is already 655207618Srdivacky /// computed and is available in the base pointer. The offset 656207618Srdivacky /// operand is always undefined. In addition to producing a 657207618Srdivacky /// chain, an unindexed load produces one value (result of the 658207618Srdivacky /// load); an unindexed store does not produce a value. 659207618Srdivacky /// 660207618Srdivacky /// PRE_INC Similar to the unindexed mode where the effective address is 661207618Srdivacky /// PRE_DEC the value of the base pointer add / subtract the offset. 662207618Srdivacky /// It considers the computation as being folded into the load / 663207618Srdivacky /// store operation (i.e. the load / store does the address 664207618Srdivacky /// computation as well as performing the memory transaction). 665207618Srdivacky /// The base operand is always undefined. In addition to 666207618Srdivacky /// producing a chain, pre-indexed load produces two values 667207618Srdivacky /// (result of the load and the result of the address 668207618Srdivacky /// computation); a pre-indexed store produces one value (result 669207618Srdivacky /// of the address computation). 670207618Srdivacky /// 671207618Srdivacky /// POST_INC The effective address is the value of the base pointer. The 672207618Srdivacky /// POST_DEC value of the offset operand is then added to / subtracted 673207618Srdivacky /// from the base after memory transaction. In addition to 674207618Srdivacky /// producing a chain, post-indexed load produces two values 675207618Srdivacky /// (the result of the load and the result of the base +/- offset 676207618Srdivacky /// computation); a post-indexed store produces one value (the 677207618Srdivacky /// the result of the base +/- offset computation). 678207618Srdivacky enum MemIndexedMode { 679207618Srdivacky UNINDEXED = 0, 680207618Srdivacky PRE_INC, 681207618Srdivacky PRE_DEC, 682207618Srdivacky POST_INC, 683207618Srdivacky POST_DEC, 684207618Srdivacky LAST_INDEXED_MODE 685207618Srdivacky }; 686207618Srdivacky 687207618Srdivacky //===--------------------------------------------------------------------===// 688207618Srdivacky /// LoadExtType enum - This enum defines the three variants of LOADEXT 689207618Srdivacky /// (load with extension). 690207618Srdivacky /// 691207618Srdivacky /// SEXTLOAD loads the integer operand and sign extends it to a larger 692207618Srdivacky /// integer result type. 693207618Srdivacky /// ZEXTLOAD loads the integer operand and zero extends it to a larger 694207618Srdivacky /// integer result type. 695212904Sdim /// EXTLOAD is used for two things: floating point extending loads and 696212904Sdim /// integer extending loads [the top bits are undefined]. 697207618Srdivacky enum LoadExtType { 698207618Srdivacky NON_EXTLOAD = 0, 699207618Srdivacky EXTLOAD, 700207618Srdivacky SEXTLOAD, 701207618Srdivacky ZEXTLOAD, 702207618Srdivacky LAST_LOADEXT_TYPE 703207618Srdivacky }; 704207618Srdivacky 705207618Srdivacky //===--------------------------------------------------------------------===// 706207618Srdivacky /// ISD::CondCode enum - These are ordered carefully to make the bitfields 707207618Srdivacky /// below work out, when considering SETFALSE (something that never exists 708207618Srdivacky /// dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered 709207618Srdivacky /// (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal 710207618Srdivacky /// to. If the "N" column is 1, the result of the comparison is undefined if 711207618Srdivacky /// the input is a NAN. 712207618Srdivacky /// 713207618Srdivacky /// All of these (except for the 'always folded ops') should be handled for 714207618Srdivacky /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT, 715207618Srdivacky /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used. 716207618Srdivacky /// 717207618Srdivacky /// Note that these are laid out in a specific order to allow bit-twiddling 718207618Srdivacky /// to transform conditions. 719207618Srdivacky enum CondCode { 720207618Srdivacky // Opcode N U L G E Intuitive operation 721207618Srdivacky SETFALSE, // 0 0 0 0 Always false (always folded) 722207618Srdivacky SETOEQ, // 0 0 0 1 True if ordered and equal 723207618Srdivacky SETOGT, // 0 0 1 0 True if ordered and greater than 724207618Srdivacky SETOGE, // 0 0 1 1 True if ordered and greater than or equal 725207618Srdivacky SETOLT, // 0 1 0 0 True if ordered and less than 726207618Srdivacky SETOLE, // 0 1 0 1 True if ordered and less than or equal 727207618Srdivacky SETONE, // 0 1 1 0 True if ordered and operands are unequal 728207618Srdivacky SETO, // 0 1 1 1 True if ordered (no nans) 729207618Srdivacky SETUO, // 1 0 0 0 True if unordered: isnan(X) | isnan(Y) 730207618Srdivacky SETUEQ, // 1 0 0 1 True if unordered or equal 731207618Srdivacky SETUGT, // 1 0 1 0 True if unordered or greater than 732207618Srdivacky SETUGE, // 1 0 1 1 True if unordered, greater than, or equal 733207618Srdivacky SETULT, // 1 1 0 0 True if unordered or less than 734207618Srdivacky SETULE, // 1 1 0 1 True if unordered, less than, or equal 735207618Srdivacky SETUNE, // 1 1 1 0 True if unordered or not equal 736207618Srdivacky SETTRUE, // 1 1 1 1 Always true (always folded) 737207618Srdivacky // Don't care operations: undefined if the input is a nan. 738207618Srdivacky SETFALSE2, // 1 X 0 0 0 Always false (always folded) 739207618Srdivacky SETEQ, // 1 X 0 0 1 True if equal 740207618Srdivacky SETGT, // 1 X 0 1 0 True if greater than 741207618Srdivacky SETGE, // 1 X 0 1 1 True if greater than or equal 742207618Srdivacky SETLT, // 1 X 1 0 0 True if less than 743207618Srdivacky SETLE, // 1 X 1 0 1 True if less than or equal 744207618Srdivacky SETNE, // 1 X 1 1 0 True if not equal 745207618Srdivacky SETTRUE2, // 1 X 1 1 1 Always true (always folded) 746207618Srdivacky 747207618Srdivacky SETCC_INVALID // Marker value. 748207618Srdivacky }; 749207618Srdivacky 750207618Srdivacky /// isSignedIntSetCC - Return true if this is a setcc instruction that 751207618Srdivacky /// performs a signed comparison when used with integer operands. 752207618Srdivacky inline bool isSignedIntSetCC(CondCode Code) { 753207618Srdivacky return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; 754207618Srdivacky } 755207618Srdivacky 756207618Srdivacky /// isUnsignedIntSetCC - Return true if this is a setcc instruction that 757207618Srdivacky /// performs an unsigned comparison when used with integer operands. 758207618Srdivacky inline bool isUnsignedIntSetCC(CondCode Code) { 759207618Srdivacky return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE; 760207618Srdivacky } 761207618Srdivacky 762207618Srdivacky /// isTrueWhenEqual - Return true if the specified condition returns true if 763207618Srdivacky /// the two operands to the condition are equal. Note that if one of the two 764207618Srdivacky /// operands is a NaN, this value is meaningless. 765207618Srdivacky inline bool isTrueWhenEqual(CondCode Cond) { 766207618Srdivacky return ((int)Cond & 1) != 0; 767207618Srdivacky } 768207618Srdivacky 769207618Srdivacky /// getUnorderedFlavor - This function returns 0 if the condition is always 770207618Srdivacky /// false if an operand is a NaN, 1 if the condition is always true if the 771207618Srdivacky /// operand is a NaN, and 2 if the condition is undefined if the operand is a 772207618Srdivacky /// NaN. 773207618Srdivacky inline unsigned getUnorderedFlavor(CondCode Cond) { 774207618Srdivacky return ((int)Cond >> 3) & 3; 775207618Srdivacky } 776207618Srdivacky 777207618Srdivacky /// getSetCCInverse - Return the operation corresponding to !(X op Y), where 778207618Srdivacky /// 'op' is a valid SetCC operation. 779207618Srdivacky CondCode getSetCCInverse(CondCode Operation, bool isInteger); 780207618Srdivacky 781207618Srdivacky /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 782207618Srdivacky /// when given the operation for (X op Y). 783207618Srdivacky CondCode getSetCCSwappedOperands(CondCode Operation); 784207618Srdivacky 785207618Srdivacky /// getSetCCOrOperation - Return the result of a logical OR between different 786207618Srdivacky /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This 787207618Srdivacky /// function returns SETCC_INVALID if it is not possible to represent the 788207618Srdivacky /// resultant comparison. 789207618Srdivacky CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger); 790207618Srdivacky 791207618Srdivacky /// getSetCCAndOperation - Return the result of a logical AND between 792207618Srdivacky /// different comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 793207618Srdivacky /// function returns SETCC_INVALID if it is not possible to represent the 794207618Srdivacky /// resultant comparison. 795207618Srdivacky CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger); 796207618Srdivacky 797207618Srdivacky //===--------------------------------------------------------------------===// 798207618Srdivacky /// CvtCode enum - This enum defines the various converts CONVERT_RNDSAT 799207618Srdivacky /// supports. 800207618Srdivacky enum CvtCode { 801245431Sdim CVT_FF, /// Float from Float 802245431Sdim CVT_FS, /// Float from Signed 803245431Sdim CVT_FU, /// Float from Unsigned 804245431Sdim CVT_SF, /// Signed from Float 805245431Sdim CVT_UF, /// Unsigned from Float 806245431Sdim CVT_SS, /// Signed from Signed 807245431Sdim CVT_SU, /// Signed from Unsigned 808245431Sdim CVT_US, /// Unsigned from Signed 809245431Sdim CVT_UU, /// Unsigned from Unsigned 810245431Sdim CVT_INVALID /// Marker - Invalid opcode 811207618Srdivacky }; 812207618Srdivacky 813207618Srdivacky} // end llvm::ISD namespace 814207618Srdivacky 815207618Srdivacky} // end llvm namespace 816207618Srdivacky 817207618Srdivacky#endif 818