| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | TaskQueue.h | 69 TaskQueue(ThreadPool &Scheduler) : Scheduler(Scheduler) { (void)Scheduler; } argument
73 Scheduler.wait();
97 Scheduler.async(std::move(T));
120 Scheduler.async(std::move(Continuation));
124 ThreadPool &Scheduler; member in class:llvm::TaskQueue
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/ |
| H A D | Scheduler.cpp | 1 //===--------------------- Scheduler.cpp ------------------------*- C++ -*-===//
13 #include "llvm/MCA/HardwareUnits/Scheduler.h"
22 void Scheduler::initializeStrategy(std::unique_ptr<SchedulerStrategy> S) {
32 void Scheduler::dump() const {
40 Scheduler::Status Scheduler::isAvailable(const InstRef &IR) {
47 return Scheduler::SC_BUFFERS_FULL;
49 return Scheduler::SC_DISPATCH_GROUP_STALL;
60 return Scheduler::SC_LOAD_QUEUE_FULL;
62 return Scheduler
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MCA/Stages/ |
| H A D | ExecuteStage.h | 21 #include "llvm/MCA/HardwareUnits/Scheduler.h"
29 Scheduler &HWS;
50 ExecuteStage(Scheduler &S) : ExecuteStage(S, false) {}
51 ExecuteStage(Scheduler &S, bool ShouldPerformBottleneckAnalysis)
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| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/ |
| H A D | Scheduler.h | 1 //===--------------------- Scheduler.h ------------------------*- C++ -*-===//
34 /// This method is used by class Scheduler to select the "best" ready
39 /// Default instruction selection strategy used by class Scheduler.
63 /// Class Scheduler is responsible for issuing instructions to pipeline
70 class Scheduler : public HardwareUnit { class in namespace:llvm::mca
73 // Instruction selection strategy for this Scheduler.
79 // Instructions dispatched to the Scheduler are internally classified based on
82 // An Instruction dispatched to the Scheduler is added to the WaitSet if not
104 // On every cycle, the Scheduler checks if it can promote instructions from the
157 Scheduler(cons function in class:llvm::mca::Scheduler
160 Scheduler(const MCSchedModel &Model, LSUnitBase &Lsu, function in class:llvm::mca::Scheduler
165 Scheduler(std::unique_ptr<ResourceManager> RM, LSUnitBase &Lsu, function in class:llvm::mca::Scheduler
[all...] |
| H A D | LSUnit.h | 27 class Scheduler;
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/MCA/Stages/ |
| H A D | ExecuteStage.cpp | 26 HWStallEvent::GenericEventType toHWStallEventType(Scheduler::Status Status) {
28 case Scheduler::SC_LOAD_QUEUE_FULL:
30 case Scheduler::SC_STORE_QUEUE_FULL:
32 case Scheduler::SC_BUFFERS_FULL:
34 case Scheduler::SC_DISPATCH_GROUP_STALL:
36 case Scheduler::SC_AVAILABLE:
44 if (Scheduler::Status S = HWS.isAvailable(IR)) {
187 assert(isAvailable(IR) && "Scheduler is not available!");
|
| /freebsd-11-stable/crypto/heimdal/appl/telnet/telnet/ |
| H A D | authenc.c | 68 if (Scheduler(0) == -1)
|
| H A D | externs.h | 184 int Scheduler(int);
|
| H A D | telnet.c | 1970 * Scheduler()
1980 Scheduler(int block) /* should we block in the select ? */ function
2146 while ((schedValue = Scheduler(0)) != 0) {
2153 if (Scheduler(1) == -1) {
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | PostRASchedulerList.cpp | 314 SchedulePostRATDList Scheduler(Fn, MLI, AA, RegClassInfo, AntiDepMode,
331 Scheduler.startBlock(&MBB);
344 Scheduler.enterRegion(&MBB, I, Current, CurrentCount - Count);
345 Scheduler.setEndIndex(CurrentCount);
346 Scheduler.schedule();
347 Scheduler.exitRegion();
348 Scheduler.EmitSchedule();
351 Scheduler.Observe(MI, CurrentCount);
360 Scheduler.enterRegion(&MBB, MBB.begin(), Current, CurrentCount);
361 Scheduler
[all...] |
| H A D | MachineScheduler.cpp | 1 //===- MachineScheduler.cpp - Machine Instruction Scheduler ---------------===//
161 void scheduleRegions(ScheduleDAGInstrs &Scheduler, bool FixKillFlags);
201 "Machine Instruction Scheduler", false, false)
208 "Machine Instruction Scheduler", false, false)
232 "PostRA Machine Instruction Scheduler", false, false)
325 ScheduleDAGInstrs *Scheduler = PassConfig->createMachineScheduler(this);
326 if (Scheduler)
327 return Scheduler;
338 ScheduleDAGInstrs *Scheduler = PassConfig->createPostMachineScheduler(this); local
339 if (Scheduler)
512 scheduleRegions(ScheduleDAGInstrs &Scheduler, bool FixKillFlags) argument
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/MCA/ |
| H A D | Context.cpp | 20 #include "llvm/MCA/HardwareUnits/Scheduler.h"
39 auto HWS = std::make_unique<Scheduler>(SM, *LSU);
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.cpp | 1 //===-- SIMachineScheduler.cpp - SI Scheduler Interface -------------------===//
10 /// SI Machine Scheduler interface
504 dbgs() << "Data Structure Bug in SI Scheduler\n";
1339 // is by far the most expensive operation of the Scheduler.
1774 SIScheduleBlockScheduler Scheduler(DAG, ScheduleVariant, Blocks);
1778 ScheduledBlocks = Scheduler.getBlocks();
1788 Res.MaxSGPRUsage = Scheduler.getSGPRUsage();
1789 Res.MaxVGPRUsage = Scheduler.getVGPRUsage();
1933 // the default Scheduler implementation (even if we do not
1962 SIScheduler Scheduler(thi
[all...] |
| /freebsd-11-stable/contrib/telnet/telnet/ |
| H A D | telnet.c | 2051 * Scheduler()
2060 Scheduler(int block) function
2157 while ((schedValue = Scheduler(0)) != 0) {
2164 if (Scheduler(1) == -1) {
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGISel.cpp | 981 ScheduleDAGSDNodes *Scheduler = CreateScheduler(); local
985 Scheduler->Run(CurDAG, FuncInfo->MBB);
989 Scheduler->viewGraph();
1000 LastMBB = FuncInfo->MBB = Scheduler->EmitSchedule(FuncInfo->InsertPt);
1012 delete Scheduler;
|
| /freebsd-11-stable/lib/clang/libllvm/ |
| H A D | Makefile | 760 SRCS_EXT+= MCA/HardwareUnits/Scheduler.cpp
|