Searched refs:SUBCARRY (Results 1 - 15 of 15) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h221 /// FIXME: These nodes are deprecated in favor of ADDCARRY and SUBCARRY.
223 /// toward the use of ADDCARRY/SUBCARRY and will eventually be removed.
243 ADDCARRY, SUBCARRY, enumerator in enum:llvm::ISD::NodeType
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.h99 SADDO, SSUBO, UADDO, USUBO, ADDCARRY, SUBCARRY,
H A DSystemZISelLowering.cpp183 setOperationAction(ISD::SUBCARRY, VT, Custom);
3645 while (Carry.getOpcode() == ISD::SUBCARRY)
3650 // Lower ADDCARRY/SUBCARRY nodes.
3679 case ISD::SUBCARRY:
3683 BaseOp = SystemZISD::SUBCARRY;
5141 case ISD::SUBCARRY:
5328 OPCODE(SUBCARRY);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1741 SDValue Sub1_Lo = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, LHS_Lo,
1743 SDValue Sub1_Hi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, LHS_Hi,
1761 SDValue Sub2_Lo = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub1_Lo,
1763 SDValue Sub2_Mi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub1_Mi,
1765 SDValue Sub2_Hi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub2_Mi,
1781 SDValue Sub3_Lo = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub2_Lo,
1783 SDValue Sub3_Mi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub2_Mi,
1785 SDValue Sub3_Hi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub3_Mi,
H A DSIISelLowering.cpp248 setOperationAction(ISD::SUBCARRY, MVT::i32, Legal);
256 setOperationAction(ISD::SUBCARRY, MVT::i64, Legal);
719 setTargetDAGCombine(ISD::SUBCARRY);
9573 Opc = (Opc == ISD::SIGN_EXTEND) ? ISD::SUBCARRY : ISD::ADDCARRY;
9614 Opc = (Opc == ISD::SIGN_EXTEND) ? ISD::ADDCARRY : ISD::SUBCARRY;
9619 if (LHS.getOpcode() == ISD::SUBCARRY) {
9625 return DAG.getNode(ISD::SUBCARRY, SDLoc(N), LHS->getVTList(), Args);
9648 (LHSOpc == ISD::SUB && Opc == ISD::SUBCARRY)) {
9995 case ISD::SUBCARRY:
H A DAMDGPUISelDAGToDAG.cpp768 case ISD::SUBCARRY:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp300 case ISD::SUBCARRY: return "subcarry";
H A DLegalizeIntegerTypes.cpp151 case ISD::SUBCARRY: Res = PromoteIntRes_ADDSUBCARRY(N, ResNo); break;
1101 // Handle promotion for the ADDE/SUBE/ADDCARRY/SUBCARRY nodes. Notice that
1103 // the ADDCARRY/SUBCARRY nodes in that the third operand is carry Boolean.
1116 // A SUBCARRY can generate borrow only if LHS < RHS and this property will be
1309 case ISD::SUBCARRY: Res = PromoteIntOp_ADDSUBCARRY(N, OpNo); break;
1905 case ISD::SUBCARRY: ExpandIntRes_ADDSUBCARRY(N, Lo, Hi); break;
2277 N->getOpcode() == ISD::ADD ? ISD::ADDCARRY : ISD::SUBCARRY,
2288 Hi = DAG.getNode(ISD::SUBCARRY, dl, VTList, HiOps);
2454 CarryOp = ISD::SUBCARRY;
4027 SDValue LowCmp = DAG.getNode(ISD::SUBCARRY, d
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H A DLegalizeDAG.cpp3441 case ISD::SUBCARRY: {
H A DDAGCombiner.cpp1523 case ISD::SUBCARRY: return visitSUBCARRY(N);
2396 if (V.getOpcode() != ISD::ADDCARRY && V.getOpcode() != ISD::SUBCARRY &&
2838 // And generate ADDCARRY (or SUBCARRY) with two result values:
2842 // Our goal is to identify A, B, and CarryIn and produce ADDCARRY/SUBCARRY with
2872 unsigned NewOp = Opcode == ISD::UADDO ? ISD::ADDCARRY : ISD::SUBCARRY;
2914 SDValue Sub = DAG.getNode(ISD::SUBCARRY, DL, N->getVTList(), N1,
H A DTargetLowering.cpp7403 // If ADD/SUBCARRY is legal, use that instead.
7404 unsigned OpcCarry = IsAdd ? ISD::ADDCARRY : ISD::SUBCARRY;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1401 setOperationAction(ISD::SUBCARRY, VT, Expand);
1404 setOperationAction(ISD::SUBCARRY, MVT::i64, Custom);
2916 case ISD::SUBCARRY: return LowerAddSubCarry(Op, DAG);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp674 setOperationAction(ISD::SUBCARRY, VT, Expand);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp1047 setOperationAction(ISD::SUBCARRY, MVT::i32, Custom);
6402 // ARMISD::SUBE expects a carry not a borrow like ISD::SUBCARRY so we
8849 // ARMISD::SUBE expects a carry not a borrow like ISD::SUBCARRY so we
8863 // by ISD::SUBCARRY, so compute 1 - C.
9353 case ISD::SUBCARRY: return LowerADDSUBCARRY(Op, DAG);
14524 // where t = (SUBCARRY 0, (SUB x, y), 0)
14526 // The SUBCARRY computes 0 - (x - y) and this will give a borrow when
14534 // ISD::SUBCARRY returns a borrow but we want the carry here
14574 // t2 = (SUBCARRY (SUB x, y), t1:0, t1:1)
14581 // t2 = (SUBCARRY
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp1936 setOperationAction(ISD::SUBCARRY, VT, Custom);
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