Searched refs:STRICT_FMUL (Results 1 - 7 of 7) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h301 STRICT_FADD, STRICT_FSUB, STRICT_FMUL, STRICT_FDIV, STRICT_FREM, enumerator in enum:llvm::ISD::NodeType
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp253 case ISD::STRICT_FMUL: return "strict_fmul";
H A DLegalizeFloatTypes.cpp96 case ISD::STRICT_FMUL:
1158 case ISD::STRICT_FMUL:
H A DLegalizeVectorOps.cpp1377 fHI = DAG.getNode(ISD::STRICT_FMUL, DL, {Node->getValueType(0), MVT::Other},
H A DLegalizeDAG.cpp4125 case ISD::STRICT_FMUL:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp466 setOperationAction(ISD::STRICT_FMUL, VT, Legal);
515 setOperationAction(ISD::STRICT_FMUL, MVT::v2f64, Legal);
572 setOperationAction(ISD::STRICT_FMUL, MVT::v4f32, Legal);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp619 setOperationAction(ISD::STRICT_FMUL, MVT::f32, Legal);
620 setOperationAction(ISD::STRICT_FMUL, MVT::f64, Legal);
672 setOperationAction(ISD::STRICT_FMUL , MVT::f80, Legal);
695 setOperationAction(ISD::STRICT_FMUL, MVT::f128, LibCall);
856 setOperationAction(ISD::STRICT_FMUL, MVT::v4f32, Legal);
1048 setOperationAction(ISD::STRICT_FMUL, MVT::v2f64, Legal);
1195 setOperationAction(ISD::STRICT_FMUL, MVT::v8f32, Legal);
1196 setOperationAction(ISD::STRICT_FMUL, MVT::v4f64, Legal);
1486 setOperationAction(ISD::STRICT_FMUL, MVT::v16f32, Legal);
1487 setOperationAction(ISD::STRICT_FMUL, MV
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