/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVLegalizerInfo.cpp | 21 RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) { argument
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H A D | RISCVLegalizerInfo.h | 25 RISCVLegalizerInfo(const RISCVSubtarget &ST);
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H A D | RISCVTargetTransformInfo.h | 33 const RISCVSubtarget *ST; member in class:llvm::RISCVTTIImpl 36 const RISCVSubtarget *getST() const { return ST; } 41 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), 42 TLI(ST->getTargetLowering()) {}
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCTargetTransformInfo.h | 33 const ARCSubtarget *ST; member in class:llvm::ARCTTIImpl 36 const ARCSubtarget *getST() const { return ST; } 41 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl()), 42 TLI(ST->getTargetLowering()) {} 46 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {} 48 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
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/freebsd-11-stable/stand/efi/libefi/ |
H A D | libefi.c | 36 EFI_SYSTEM_TABLE *ST; variable 46 for (i = 0; i < ST->NumberOfTableEntries; i++) { 47 id = &ST->ConfigurationTable[i].VendorGuid; 49 return (ST->ConfigurationTable[i].VendorTable);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VETargetTransformInfo.h | 30 const VESubtarget *ST; member in class:llvm::VETTIImpl 33 const VESubtarget *getST() const { return ST; } 38 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), 39 TLI(ST->getTargetLowering()) {}
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H A D | VEInstrInfo.h | 32 explicit VEInstrInfo(VESubtarget &ST);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreTargetTransformInfo.h | 32 const XCoreSubtarget *ST; member in class:llvm::XCoreTTIImpl 35 const XCoreSubtarget *getST() const { return ST; } 40 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl()), 41 TLI(ST->getTargetLowering()) {}
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | BasicTargetTransformInfo.cpp | 33 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), 34 TLI(ST->getTargetLowering()) {}
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86MacroFusion.cpp | 38 const X86Subtarget &ST = static_cast<const X86Subtarget &>(TSI); local 41 if (!(ST.hasBranchFusion() || ST.hasMacroFusion())) 54 if (ST.hasBranchFusion()) { 60 if (ST.hasMacroFusion()) {
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsLegalizerInfo.cpp | 53 MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) { argument 66 .legalIf([=, &ST](const LegalityQuery &Query) { 69 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) 83 .legalIf([=, &ST](const LegalityQuery &Query) { 84 if (CheckTy0Ty1MemSizeAlign(Query, {{s32, p0, 8, ST.hasMips32r6()}, 85 {s32, p0, 16, ST.hasMips32r6()}, 86 {s32, p0, 32, ST.hasMips32r6()}, 87 {p0, p0, 32, ST.hasMips32r6()}, 88 {s64, p0, 64, ST.hasMips32r6()}})) 90 if (ST 317 SelectMSA3OpIntrinsic(MachineInstr &MI, unsigned Opcode, MachineIRBuilder &MIRBuilder, const MipsSubtarget &ST) argument 332 MSA3OpIntrinsicToGeneric(MachineInstr &MI, unsigned Opcode, MachineIRBuilder &MIRBuilder, const MipsSubtarget &ST) argument 344 MSA2OpIntrinsicToGeneric(MachineInstr &MI, unsigned Opcode, MachineIRBuilder &MIRBuilder, const MipsSubtarget &ST) argument 358 const MipsSubtarget &ST = local [all...] |
H A D | MipsFrameLowering.h | 31 static const MipsFrameLowering *create(const MipsSubtarget &ST); 53 const MipsFrameLowering *createMips16FrameLowering(const MipsSubtarget &ST); 54 const MipsFrameLowering *createMipsSEFrameLowering(const MipsSubtarget &ST);
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H A D | MipsLegalizerInfo.h | 26 MipsLegalizerInfo(const MipsSubtarget &ST);
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H A D | MipsFrameLowering.cpp | 82 const MipsFrameLowering *MipsFrameLowering::create(const MipsSubtarget &ST) { argument 83 if (ST.inMips16Mode()) 84 return llvm::createMips16FrameLowering(ST); 86 return llvm::createMipsSEFrameLowering(ST);
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MC/ |
H A D | MCSectionXCOFF.h | 43 XCOFF::SymbolType ST, XCOFF::StorageClass SC, SectionKind K, 46 Type(ST), StorageClass(SC), QualName(QualName) { 47 assert((ST == XCOFF::XTY_SD || ST == XCOFF::XTY_CM || ST == XCOFF::XTY_ER) && 42 MCSectionXCOFF(StringRef Section, XCOFF::StorageMappingClass SMC, XCOFF::SymbolType ST, XCOFF::StorageClass SC, SectionKind K, MCSymbolXCOFF *QualName, MCSymbol *Begin) argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIFixVGPRCopies.cpp | 49 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); local 50 const SIRegisterInfo *TRI = ST.getRegisterInfo(); 51 const SIInstrInfo *TII = ST.getInstrInfo();
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H A D | AMDGPUTargetTransformInfo.h | 49 const GCNSubtarget *ST; member in class:llvm::final 52 const TargetSubtargetInfo *getST() const { return ST; } 59 ST(static_cast<const GCNSubtarget *>(TM->getSubtargetImpl(F))), 60 TLI(ST->getTargetLowering()) {} 72 const GCNSubtarget *ST; member in class:llvm::final 105 const GCNSubtarget *getST() const { return ST; } 125 return ST->hasHalfRate64Ops() ? 132 ST(static_cast<const GCNSubtarget*>(TM->getSubtargetImpl(F))), 133 TLI(ST->getTargetLowering()), 136 HasFP32Denormals(ST 239 const R600Subtarget *ST; member in class:llvm::final [all...] |
H A D | SIOptimizeExecMaskingPreRA.cpp | 87 const GCNSubtarget &ST) { 88 if (ST.isWave32()) { 97 static bool isFullExecCopy(const MachineInstr& MI, const GCNSubtarget& ST) { argument 98 unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC; 110 const GCNSubtarget& ST) { 111 unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC; 124 const GCNSubtarget& ST) { 125 auto SavedExec = getOrNonExecReg(MI, TII, ST); 129 if (!SaveExecInst || !isFullExecCopy(*SaveExecInst, ST)) 190 const GCNSubtarget &ST, 86 isEndCF(const MachineInstr &MI, const SIRegisterInfo *TRI, const GCNSubtarget &ST) argument 108 getOrNonExecReg(const MachineInstr &MI, const SIInstrInfo &TII, const GCNSubtarget& ST) argument 121 getOrExecSource(const MachineInstr &MI, const SIInstrInfo &TII, const MachineRegisterInfo &MRI, const GCNSubtarget& ST) argument 189 optimizeVcndVcmpPair(MachineBasicBlock &MBB, const GCNSubtarget &ST, MachineRegisterInfo &MRI, LiveIntervals *LIS) argument 298 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMMacroFusion.cpp | 55 const ARMSubtarget &ST = static_cast<const ARMSubtarget&>(TSI); local 57 if (ST.hasFuseAES() && isAESPair(FirstMI, SecondMI)) 59 if (ST.hasFuseLiterals() && isLiteralsPair(FirstMI, SecondMI))
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H A D | ARMTargetTransformInfo.h | 47 const ARMSubtarget *ST; member in class:llvm::ARMTTIImpl 83 const ARMSubtarget *getST() const { return ST; } 88 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), 89 TLI(ST->getTargetLowering()) {} 99 return ST->isMClass() && ST->isThumb2() && L->getNumBlocks() == 1; 106 return !ST->isTargetDarwin() && !ST->hasMVEFloatOps(); 128 if (ST->hasNEON()) 130 if (ST [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyTargetTransformInfo.h | 33 const WebAssemblySubtarget *ST; member in class:llvm::final 36 const WebAssemblySubtarget *getST() const { return ST; } 41 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), 42 TLI(ST->getTargetLowering()) {}
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonHazardRecognizer.h | 46 const HexagonSubtarget &ST) 47 : Resources(ST.createDFAPacketizer(II)), TII(HII) { } 44 HexagonHazardRecognizer(const InstrItineraryData *II, const HexagonInstrInfo *HII, const HexagonSubtarget &ST) argument
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MCA/ |
H A D | CodeEmitter.h | 58 CodeEmitter(const MCSubtargetInfo &ST, const MCAsmBackend &AB, argument 60 : STI(ST), MAB(AB), MCE(CE), VecOS(Code), Sequence(S),
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/freebsd-11-stable/contrib/llvm-project/llvm/tools/llvm-mca/Views/ |
H A D | InstructionInfoView.h | 61 InstructionInfoView(const llvm::MCSubtargetInfo &ST, argument 65 : STI(ST), MCII(II), CE(C), PrintEncodings(ShouldPrintEncodings),
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/TableGen/ |
H A D | SetTheory.cpp | 40 void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, 42 ST.evaluate(Expr->arg_begin(), Expr->arg_end(), Elts, Loc); 48 void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, 54 ST.evaluate(*Expr->arg_begin(), Add, Loc); 55 ST.evaluate(Expr->arg_begin() + 1, Expr->arg_end(), Sub, Loc); 64 void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, 70 ST.evaluate(Expr->arg_begin()[0], S1, Loc); 71 ST.evaluate(Expr->arg_begin()[1], S2, Loc); 80 virtual void apply2(SetTheory &ST, DagInit *Expr, RecSet &Set, int64_t N, 83 void apply(SetTheory &ST, DagIni [all...] |