1//===--- HexagonHazardRecognizer.h - Hexagon Post RA Hazard Recognizer ----===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8// This file defines the hazard recognizer for scheduling on Hexagon.
9//===----------------------------------------------------------------------===//
10
11#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONPROFITRECOGNIZER_H
12#define LLVM_LIB_TARGET_HEXAGON_HEXAGONPROFITRECOGNIZER_H
13
14#include "HexagonInstrInfo.h"
15#include "HexagonSubtarget.h"
16#include "llvm/ADT/SmallSet.h"
17#include "llvm/CodeGen/DFAPacketizer.h"
18#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
19
20namespace llvm {
21
22class HexagonHazardRecognizer : public ScheduleHazardRecognizer {
23  DFAPacketizer *Resources;
24  const HexagonInstrInfo *TII;
25  unsigned PacketNum = 0;
26  // If the packet contains a potential dot cur instruction. This is
27  // used for the scheduling priority function.
28  SUnit *UsesDotCur = nullptr;
29  // The packet number when a dor cur is emitted. If its use is not generated
30  // in the same packet, then try to wait another cycle before emitting.
31  int DotCurPNum = -1;
32  // Does the packet contain a load. Used to restrict another load, if possible.
33  bool UsesLoad = false;
34  // Check if we should prefer a vector store that will become a .new version.
35  // The .new store uses different resources than a normal store, and the
36  // packetizer will not generate the .new if the regular store does not have
37  // resources available (even if the .new version does). To help, the schedule
38  // attempts to schedule the .new as soon as possible in the packet.
39  SUnit *PrefVectorStoreNew = nullptr;
40  // The set of registers defined by instructions in the current packet.
41  SmallSet<unsigned, 8> RegDefs;
42
43public:
44  HexagonHazardRecognizer(const InstrItineraryData *II,
45                          const HexagonInstrInfo *HII,
46                          const HexagonSubtarget &ST)
47    : Resources(ST.createDFAPacketizer(II)), TII(HII) { }
48
49  ~HexagonHazardRecognizer() override {
50    if (Resources)
51      delete Resources;
52  }
53
54  /// This callback is invoked when a new block of instructions is about to be
55  /// scheduled. The hazard state is set to an initialized state.
56  void Reset() override;
57
58  /// Return the hazard type of emitting this node.  There are three
59  /// possible results.  Either:
60  ///  * NoHazard: it is legal to issue this instruction on this cycle.
61  ///  * Hazard: issuing this instruction would stall the machine.  If some
62  ///     other instruction is available, issue it first.
63  HazardType getHazardType(SUnit *SU, int stalls) override;
64
65  /// This callback is invoked when an instruction is emitted to be scheduled,
66  /// to advance the hazard state.
67  void EmitInstruction(SUnit *) override;
68
69  /// This callback may be invoked if getHazardType returns NoHazard. If, even
70  /// though there is no hazard, it would be better to schedule another
71  /// available instruction, this callback should return true.
72  bool ShouldPreferAnother(SUnit *) override;
73
74  /// This callback is invoked whenever the next top-down instruction to be
75  /// scheduled cannot issue in the current cycle, either because of latency
76  /// or resource conflicts.  This should increment the internal state of the
77  /// hazard recognizer so that previously "Hazard" instructions will now not
78  /// be hazards.
79  void AdvanceCycle() override;
80};
81
82} // end namespace llvm
83
84#endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONPROFITRECOGNIZER_H
85