Searched refs:ResultVT (Results 1 - 7 of 7) sorted by relevance
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | ValueTypes.cpp | 37 EVT ResultVT; local 38 ResultVT.LLVMTy = VectorType::get(VT.getTypeForEVT(Context), NumElements); 39 assert(ResultVT.isExtended() && "Type is not extended!"); 40 return ResultVT;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeTypes.cpp | 235 EVT ResultVT = N->getValueType(i); local 236 LLVM_DEBUG(dbgs() << "Analyzing result type: " << ResultVT.getEVTString() 238 switch (getTypeAction(ResultVT)) {
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H A D | SelectionDAGBuilder.cpp | 6646 EVT ResultVT = Op1.getValueType(); local 6648 if (ResultVT.isVector()) 6650 *Context, OverflowVT, ResultVT.getVectorNumElements()); 6652 SDVTList VTs = DAG.getVTList(ResultVT, OverflowVT); 8478 EVT ResultVT = TLI.getValueType(DAG.getDataLayout(), *CurResultType); 8490 if (ResultVT != V.getValueType() && 8491 ResultVT.getSizeInBits() == V.getValueSizeInBits()) 8492 V = DAG.getNode(ISD::BITCAST, getCurSDLoc(), ResultVT, V); 8493 else if (ResultVT != V.getValueType() && ResultVT [all...] |
H A D | DAGCombiner.cpp | 16947 EVT ResultVT = EVE->getValueType(0); local 16956 ISD::LoadExtType ExtTy = ResultVT.bitsGT(VecEltVT) ? 16992 if (ResultVT.bitsGT(VecEltVT)) { 16995 ISD::LoadExtType ExtType = TLI.isLoadExtLegal(ISD::ZEXTLOAD, ResultVT, 16999 Load = DAG.getExtLoad(ExtType, SDLoc(EVE), ResultVT, 17009 if (ResultVT.bitsLT(VecEltVT)) 17010 Load = DAG.getNode(ISD::TRUNCATE, SDLoc(EVE), ResultVT, Load); 17012 Load = DAG.getBitcast(ResultVT, Load);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 4884 EVT ResultVT = Op.getValueType(); 4913 if (ResultVT == MVT::f16) { 4915 return DAG.getNode(ISD::BITCAST, SL, ResultVT, Result); 4918 return DAG.getAnyExtOrTrunc(Elt, SL, ResultVT); 4929 EVT ResultVT = Op.getValueType(); 4932 EVT PackVT = ResultVT.isInteger() ? MVT::v2i16 : MVT::v2f16; 4947 for (int I = 0, N = ResultVT.getVectorNumElements(); I != N; I += 2) { 4975 return DAG.getNode(ISD::CONCAT_VECTORS, SL, ResultVT, Pieces); 10236 MVT ResultVT = NewChannels == 1 ? local 10240 DAG.getVTList(ResultVT, MV [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 227 unsigned emitLoad(MVT VT, MVT ResultVT, Address Addr, bool WantZExt = true,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 5624 EVT ResultVT = EVT::getVectorVT(*DAG.getContext(), ElVT, 5637 return DAG.getBuildVector(ResultVT, dl, 5641 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec, VecIdx); 5674 EVT ResultVT = Result.getValueType(); 5685 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Result, Vec, VecIdx); [all...] |
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