Searched refs:RADEON_VCLK_ECP_CNTL (Results 1 - 4 of 4) sorted by relevance

/freebsd-11-stable/sys/dev/drm2/radeon/
H A Dradeon_clocks.c526 tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);
529 WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);
579 tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);
582 WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);
732 tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);
736 WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);
768 tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);
772 WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);
819 tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);
823 WREG32_PLL(RADEON_VCLK_ECP_CNTL, tm
[all...]
H A Dradeon_legacy_crtc.c921 WREG32_PLL_P(RADEON_VCLK_ECP_CNTL,
993 WREG32_PLL_P(RADEON_VCLK_ECP_CNTL,
H A Dradeon_legacy_encoders.c655 vclk_ecp_cntl = RREG32_PLL(RADEON_VCLK_ECP_CNTL);
663 WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);
706 WREG32_PLL(RADEON_VCLK_ECP_CNTL, vclk_ecp_cntl);
H A Dradeon_reg.h1787 #define RADEON_VCLK_ECP_CNTL 0x0008 /* PLL */ macro

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