Searched refs:RADEON_PPLL_REF_DIV (Results 1 - 4 of 4) sorted by relevance

/freebsd-11-stable/sys/dev/drm2/radeon/
H A Dradeon_legacy_crtc.c224 RREG32_PLL(RADEON_PPLL_REF_DIV) & RADEON_PPLL_ATOMIC_UPDATE_R);
232 while (RREG32_PLL(RADEON_PPLL_REF_DIV) & RADEON_PPLL_ATOMIC_UPDATE_R);
234 WREG32_PLL_P(RADEON_PPLL_REF_DIV,
910 if ((pll_ref_div == (RREG32_PLL(RADEON_PPLL_REF_DIV) & RADEON_PPLL_REF_DIV_MASK)) &&
947 WREG32_PLL_P(RADEON_PPLL_REF_DIV,
952 WREG32_PLL_P(RADEON_PPLL_REF_DIV,
957 WREG32_PLL_P(RADEON_PPLL_REF_DIV,
H A Dradeon_clocks.c122 p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff;
200 u32 tmp = RREG32_PLL(RADEON_PPLL_REF_DIV);
242 RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff;
H A Dradeon_reg.h1581 #define RADEON_PPLL_REF_DIV 0x0003 /* PLL */ macro
H A Dradeon_combios.c1235 RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff;

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