Searched refs:PredDef (Results 1 - 3 of 3) sorted by relevance
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 1707 MachineInstr *PredDef = MRI->getVRegDef(P); local
1709 if (!PredDef->isCompare())
1719 for (unsigned i = 0, n = PredDef->getNumOperands(); i < n; ++i) {
1720 MachineOperand &MO = PredDef->getOperand(i);
1768 for (unsigned i = 1, n = PredDef->getNumOperands(); i < n; ++i) {
1769 MachineOperand &MO = PredDef->getOperand(i);
1792 bool Order = orderBumpCompare(IndI, PredDef);
1805 getComparisonKind(PredDef->getOpcode(), nullptr, nullptr, 0);
1823 if (!isImmValidForOpcode(PredDef->getOpcode(), CmpImm))
1829 bool Order = orderBumpCompare(BumpI, PredDef);
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| /freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CodeGenSchedule.cpp | 1343 bool mutuallyExclusive(Record *PredDef, ArrayRef<PredCheck> Term);
1361 bool PredTransitions::mutuallyExclusive(Record *PredDef, argument
1364 if (PC.Predicate == PredDef)
1370 if (any_of(Variants, [PredDef](const Record *R) {
1371 return R->getValueAsDef("Predicate") == PredDef;
1482 Record *PredDef = Variant.VarOrSeqDef->getValueAsDef("Predicate"); local
1483 if (mutuallyExclusive(PredDef, TransVec[TransIdx].PredTerm))
1517 Record *PredDef = VInfo.VarOrSeqDef->getValueAsDef("Predicate"); local
1518 Trans.PredTerm.emplace_back(IsRead, VInfo.RWIdx,PredDef);
2154 for (const Record *PredDef
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyCFG.cpp | 833 BasicBlock *PredDef = local
835 EliminateBlockCases(PredDef, PredCases); // Remove default from cases.
844 if (PredDef == TI->getParent()) {
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