/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/Utils/ |
H A D | X86ShuffleDecode.cpp | 150 unsigned NumLanes = Size / 128; local 151 if (NumLanes == 0) NumLanes = 1; // Handle MMX 152 unsigned NumLaneElts = NumElts / NumLanes; 227 unsigned NumLanes = (NumElts * ScalarBits) / 128; local 228 if (NumLanes == 0) NumLanes = 1; // Handle MMX 229 unsigned NumLaneElts = NumElts / NumLanes; 246 unsigned NumLanes = (NumElts * ScalarBits) / 128; local 247 if (NumLanes 281 unsigned NumLanes = NumElts / NumElementsInLane; local 518 unsigned NumLanes = VecSize / 128; local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineFunctionInfo.cpp | 248 /// \p returns true if \p NumLanes slots are available in VGPRs already used for 278 int NumLanes = Size / 4; local 284 for (int I = 0; I < NumLanes; ++I, ++NumVGPRSpillLanes) { 339 unsigned NumLanes = Size / 4; local 340 Spill.Lanes.resize(NumLanes, AMDGPU::NoRegister); 368 for (unsigned I = 0; I < NumLanes; ++I) {
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86MCInstLower.cpp | 2497 int NumLanes = 1; local 2498 // Override NumLanes for the broadcast instructions. 2500 case X86::VBROADCASTF128: NumLanes = 2; break; 2501 case X86::VBROADCASTI128: NumLanes = 2; break; 2502 case X86::VBROADCASTF32X4Z256rm: NumLanes = 2; break; 2503 case X86::VBROADCASTF32X4rm: NumLanes = 4; break; 2504 case X86::VBROADCASTF32X8rm: NumLanes = 2; break; 2505 case X86::VBROADCASTF64X2Z128rm: NumLanes = 2; break; 2506 case X86::VBROADCASTF64X2rm: NumLanes = 4; break; 2507 case X86::VBROADCASTF64X4rm: NumLanes [all...] |
H A D | X86InterleavedAccess.cpp | 476 unsigned NumLanes = std::max((int)VT.getSizeInBits() / 128, 1); local 477 unsigned NumLaneElts = NumElts / NumLanes;
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H A D | X86ISelLowering.cpp | 6521 unsigned NumLanes = VT.getSizeInBits() / 128; 6525 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { 6536 int NumLanes = VT.getSizeInBits() / 128; 6539 int NumEltsPerLane = NumElts / NumLanes; 6540 int NumInnerEltsPerLane = NumInnerElts / NumLanes; 6546 for (int Lane = 0; Lane != NumLanes; ++Lane) { 6561 int NumLanes = VT.getSizeInBits() / 128; 6563 int NumEltsPerLane = NumElts / NumLanes; 11432 int NumLanes = VT.getSizeInBits() / 128; 11433 int NumLaneElts = NumElts / NumLanes; [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64InstPrinter.h | 149 template <unsigned NumLanes, char LaneKind>
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H A D | AArch64InstPrinter.cpp | 1318 template <unsigned NumLanes, char LaneKind> 1323 if (NumLanes) 1324 Suffix += itostr(NumLanes) + LaneKind;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineSimplifyDemanded.cpp | 1684 unsigned NumLanes = Ty0->getPrimitiveSizeInBits() / 128; local 1685 unsigned VWidthPerLane = VWidth / NumLanes; 1686 unsigned InnerVWidthPerLane = InnerVWidth / NumLanes; 1694 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { 1709 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) {
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H A D | InstCombineCalls.cpp | 561 unsigned NumLanes = ResTy->getPrimitiveSizeInBits() / 128; local 566 unsigned NumSrcEltsPerLane = NumSrcElts / NumLanes; 604 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) {
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
H A D | SLPVectorizer.cpp | 779 for (unsigned Lane = 0, NumLanes = getNumLanes(); Lane != NumLanes; 1090 for (unsigned Lane = 0, NumLanes = getNumLanes(); Lane != NumLanes; 1128 unsigned NumLanes = VL.size(); local 1130 OpsVec[OpIdx].resize(NumLanes); 1131 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { 1219 unsigned NumLanes = getNumLanes(); local 1278 for (unsigned Distance = 1; Distance != NumLanes; ++Distance) { 1282 if (Lane < 0 || Lane >= (int)NumLanes) 1500 unsigned NumLanes = Scalars.size(); local [all...] |
/freebsd-11-stable/contrib/llvm-project/clang/utils/TableGen/ |
H A D | NeonEmitter.cpp | 745 unsigned NumLanes; 746 Name.substr(0, I).getAsInteger(10, NumLanes); 748 T.Bitwidth = T.ElementBitwidth * NumLanes;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/IR/ |
H A D | AutoUpgrade.cpp | 2320 unsigned NumLanes = VT->getPrimitiveSizeInBits() / 128; local 2322 unsigned ControlBitsMask = NumLanes - 1; 2323 unsigned NumControlBits = NumLanes / 2; 2326 for (unsigned l = 0; l != NumLanes; ++l) { 2329 if (l >= NumLanes / 2) 2330 LaneMask += NumLanes;
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/freebsd-11-stable/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGBuiltin.cpp | 11243 unsigned NumLanes = Ty->getPrimitiveSizeInBits() / 128; 11244 unsigned NumLaneElts = NumElts / NumLanes; 11270 unsigned NumLanes = Ty->getPrimitiveSizeInBits() / 128; 11271 unsigned NumLaneElts = NumElts / NumLanes; 11376 unsigned NumLanes = Ty->getPrimitiveSizeInBits() == 512 ? 4 : 2; 11377 unsigned NumLaneElts = NumElts / NumLanes; 11381 unsigned Index = (Imm % NumLanes) * NumLaneElts; 11382 Imm /= NumLanes; // Discard the bits we just used.
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 13693 unsigned NumLanes = Op.getValueType().getVectorNumElements(); local 13694 if (FloatBits != 32 || IntBits > 32 || (NumLanes != 4 && NumLanes != 2)) { 13713 ISD::INTRINSIC_WO_CHAIN, dl, NumLanes == 2 ? MVT::v2i32 : MVT::v4i32, 13751 unsigned NumLanes = Op.getValueType().getVectorNumElements(); local 13752 if (FloatBits != 32 || IntBits > 32 || (NumLanes != 4 && NumLanes != 2)) { 13771 dl, NumLanes == 2 ? MVT::v2i32 : MVT::v4i32,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 9982 unsigned NumLanes = Op.getValueType().getVectorNumElements(); local 9983 switch (NumLanes) { 10055 unsigned NumLanes = Op.getValueType().getVectorNumElements(); local 10056 switch (NumLanes) {
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 2084 template <unsigned NumLanes> 2087 return VectorIndex.Val < NumLanes;
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