Searched refs:NumDefs (Results 1 - 25 of 30) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizationArtifactCombiner.h288 unsigned NumDefs = MI.getNumOperands() - 1; local
290 getDefIgnoringCopies(MI.getOperand(NumDefs).getReg(), MRI);
294 LLT OpTy = MRI.getType(MI.getOperand(NumDefs).getReg());
312 if (NumMergeRegs < NumDefs) {
313 if (NumDefs % NumMergeRegs != 0)
324 const unsigned NewNumDefs = NumDefs / NumMergeRegs;
350 } else if (NumMergeRegs > NumDefs) {
351 if (ConvertOp != 0 || NumMergeRegs % NumDefs != 0)
362 const unsigned NumRegs = NumMergeRegs / NumDefs;
363 for (unsigned DefIdx = 0; DefIdx < NumDefs;
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/MC/
H A DMCInstrDesc.cpp55 for (int i = 0, e = NumDefs; i != e; ++i)
/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/GlobalISel/
H A DGIMatchDagOperands.cpp81 i < I.Operands.NumDefs);
92 NewValue->add(I.Operands[i].Name, i, i < I.Operands.NumDefs);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DAsmPrinterInlineAsm.cpp498 unsigned NumDefs = 0; local
499 for (; MI->getOperand(NumDefs).isReg() && MI->getOperand(NumDefs).isDef();
500 ++NumDefs)
501 assert(NumDefs != MI->getNumOperands()-2 && "No asm string?");
503 assert(MI->getOperand(NumDefs).isSymbol() && "No asm string?");
506 const char *AsmStr = MI->getOperand(NumDefs).getSymbolName();
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DImplicitNullChecks.cpp622 unsigned NumDefs = MI->getDesc().getNumDefs(); local
623 assert(NumDefs <= 1 && "other cases unhandled!");
626 if (NumDefs != 0) {
628 assert(NumDefs == 1 && "expected exactly one def!");
H A DMachineCSE.cpp593 unsigned NumDefs = MI->getNumDefs(); local
595 for (unsigned i = 0, e = MI->getNumOperands(); NumDefs && i != e; ++i) {
613 --NumDefs;
638 --NumDefs;
H A DPeepholeOptimizer.cpp866 unsigned NumDefs; ///< Number of defs in the bitcast. member in class:__anon1782::ValueTrackerResult::__anon1783::UncoalescableRewriter
870 NumDefs = MI.getDesc().getNumDefs();
880 if (CurrentSrcIdx == NumDefs)
885 if (CurrentSrcIdx == NumDefs)
H A DMachineLICM.cpp1164 unsigned NumDefs = MI.getDesc().getNumDefs(); local
1165 for (unsigned i = 0, e = MI.getNumOperands(); NumDefs && i != e; ++i) {
1169 --NumDefs;
H A DMachineInstr.cpp719 unsigned NumDefs = MCID->getNumDefs(); local
721 return NumDefs;
723 for (unsigned I = NumDefs, E = getNumOperands(); I != E; ++I) {
727 ++NumDefs;
729 return NumDefs;
H A DMachineVerifier.cpp1582 unsigned NumDefs = MCID.getNumDefs(); local
1584 NumDefs = (MONum == 0 && MO->isReg()) ? NumDefs : 0;
1586 // The first MCID.NumDefs operands must be explicit register defines
1587 if (MONum < NumDefs) {
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrDesc.h192 unsigned char NumDefs; // Num of args that are definitions member in class:llvm::MCInstrDesc
250 unsigned getNumDefs() const { return NumDefs; }
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.cpp813 unsigned NumDefs = II.getNumDefs();
824 NumDefs = NumResults;
831 countOperands(Node, II.getNumOperands() - NumDefs, NumImpUses);
832 bool HasPhysRegOuts = NumResults > NumDefs && II.getImplicitDefs()!=nullptr;
892 bool HasOptPRefs = NumDefs > NumResults;
895 unsigned NumSkip = HasOptPRefs ? NumDefs - NumResults : 0;
897 AddOperand(MIB, Node->getOperand(i), i-NumSkip+NumDefs, &II,
934 for (unsigned i = NumDefs; i < NumResults; ++i) {
935 Register Reg = II.getImplicitDefs()[i - NumDefs];
H A DScheduleDAGRRList.cpp2114 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs();
2115 for (unsigned i = 0; i != NumDefs; ++i) {
2160 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs();
2161 for (unsigned i = 0; i != NumDefs; ++i) {
2289 unsigned NumDefs = TII->get(PN->getMachineOpcode()).getNumDefs();
2290 for (unsigned i = 0; i != NumDefs; ++i) {
2306 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs();
2307 for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) {
2877 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs();
2889 for (unsigned i = NumDefs,
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenInstruction.cpp43 NumDefs = OutDI->getNumArgs();
62 if (i < NumDefs) {
66 ArgInit = InDI->getArg(i-NumDefs);
67 ArgName = InDI->getArgNameStr(i-NumDefs);
288 if (DestOp.first >= Ops.NumDefs)
292 if (SrcOp.first < Ops.NumDefs)
H A DInstrDocsEmitter.cpp156 bool IsDef = i < II->Operands.NumDefs;
H A DCodeGenInstruction.h141 /// NumDefs - Number of def operands declared, this is the number of
144 unsigned NumDefs; member in class:llvm::CGIOperandList
H A DInstrInfoEmitter.cpp663 << Inst.Operands.NumDefs << ",\t"
H A DGlobalISelEmitter.cpp4289 for (unsigned I = 0; I < DstI->Operands.NumDefs; ++I) {
4368 unsigned DstINumUses = OrigDstI->Operands.size() - OrigDstI->Operands.NumDefs;
4376 unsigned NumResults = OrigDstI->Operands.NumDefs;
4403 unsigned InstOpNo = DstI->Operands.NumDefs + I;
4534 if (Inst.Operands.NumDefs > 1)
4710 if (DstI.Operands.NumDefs != Src->getExtTypes().size())
4713 to_string(DstI.Operands.NumDefs) + " def(s))");
H A DCodeGenDAGPatterns.cpp1811 unsigned NumDefsToAdd = InstInfo.Operands.NumDefs;
1814 for (unsigned i = 0; i != InstInfo.Operands.NumDefs; ++i) {
2465 unsigned NumResultsToAdd = std::min(InstInfo.Operands.NumDefs,
3830 for (unsigned j = 0, e = InstInfo.Operands.NumDefs; j < e; ++j)
3834 for (unsigned j = InstInfo.Operands.NumDefs,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBTFDebug.cpp1020 unsigned NumDefs = 0; local
1021 for (; MI->getOperand(NumDefs).isReg() && MI->getOperand(NumDefs).isDef();
1022 ++NumDefs)
1026 const char *AsmStr = MI->getOperand(NumDefs).getSymbolName();
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86BaseInfo.h976 unsigned NumDefs = Desc.getNumDefs(); local
978 switch (NumDefs) {
H A DX86MCTargetDesc.cpp416 unsigned NumDefs = Desc.getNumDefs(); local
418 assert(Mask.getBitWidth() == NumDefs + NumImplicitDefs &&
449 for (unsigned I = 0, E = NumDefs; I < E; ++I) {
458 Mask.setBit(NumDefs + I);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp192 unsigned NumDefs = 0;
198 NumDefs++;
202 if (NumDefs == 0)
H A DHexagonInstrInfo.cpp4312 unsigned NumDefs = 0; local
4313 for (; MI.getOperand(NumDefs).isReg() && MI.getOperand(NumDefs).isDef();
4314 ++NumDefs)
4315 assert(NumDefs != MI.getNumOperands()-2 && "No asm string?");
4317 assert(MI.getOperand(NumDefs).isSymbol() && "No asm string?");
4319 const char *AsmStr = MI.getOperand(NumDefs).getSymbolName();
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstructionSelector.cpp1335 unsigned NumDefs = I.getNumOperands() - 1; local
1336 Register SrcReg = I.getOperand(NumDefs).getReg();
1339 for (unsigned Idx = 0; Idx < NumDefs; ++Idx) {

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