/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CallLowering.cpp | 197 MVT NewVT = TLI->getRegisterTypeForCallingConv( 206 if (NewVT.getSizeInBits() * NumParts != CurVT.getSizeInBits()) 221 if (Handler.assignArg(i, NewVT, NewVT, CCValAssign::Full, Args[i], 231 LLT NewLLT = getLLTForMVT(NewVT); 248 if (Handler.assignArg(i + Part, NewVT, NewVT, CCValAssign::Full, 263 LLT SmallTy = LLT::scalar(NewVT.getSizeInBits()); 281 if (Handler.assignArg(i + PartIdx, NewVT, NewVT, CCValAssig [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFISelLowering.h | 122 EVT NewVT) const override {
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeTypesGeneric.cpp | 213 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); local 226 NewVT, 2*OldElts), 233 Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); 237 Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); 371 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); local 391 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NewElts.size());
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H A D | LegalizeVectorTypes.cpp | 281 EVT NewVT = N->getValueType(0).getVectorElementType(); local 283 NewVT, Op); 303 EVT NewVT = N->getValueType(0).getVectorElementType(); local 306 NewVT, Op, N->getOperand(1)); 1775 EVT NewVT = Inputs[0].getValueType(); local 1776 unsigned NewElts = NewVT.getVectorNumElements(); 1833 EVT EltVT = NewVT.getVectorElementType(); 1860 Output = DAG.getBuildVector(NewVT, dl, SVOps); 1863 Output = DAG.getUNDEF(NewVT); 1868 DAG.getUNDEF(NewVT) 4411 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts); local 4429 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NewNumElts); local 4891 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff); local 5090 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT); local [all...] |
H A D | DAGCombiner.cpp | 4101 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), SimpleSize*2); local 4102 if (TLI.isOperationLegal(ISD::MUL, NewVT)) { 4103 N0 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N0); 4104 N1 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N1); 4105 N1 = DAG.getNode(ISD::MUL, DL, NewVT, N0, N1); 4106 N1 = DAG.getNode(ISD::SRL, DL, NewVT, N1, 4157 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), SimpleSize*2); local 4158 if (TLI.isOperationLegal(ISD::MUL, NewVT)) { 4159 N0 = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N0); 4160 N1 = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N 4233 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), SimpleSize*2); local 4276 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), SimpleSize*2); local 15160 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), NewBW); local 17913 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), local 19654 EVT NewVT; local [all...] |
H A D | TargetLowering.cpp | 230 EVT NewVT = VT; local 235 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32; 236 if (isOperationLegalOrCustom(ISD::STORE, NewVT) && 237 isSafeMemOpType(NewVT.getSimpleVT())) 239 else if (NewVT == MVT::i64 && 243 NewVT = MVT::f64; 250 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1); 251 if (NewVT == MVT::i8) 253 } while (!isSafeMemOpType(NewVT [all...] |
H A D | LegalizeDAG.cpp | 3053 EVT NewVT = 3056 assert(NewVT.bitsEq(VT)); 3059 Op0 = DAG.getNode(ISD::BITCAST, dl, NewVT, Op0); 3060 Op1 = DAG.getNode(ISD::BITCAST, dl, NewVT, Op1); 3064 NewVT.getVectorNumElements()/VT.getVectorNumElements(); 3080 VT = NewVT;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 963 MVT NewVT = MVT::getVectorVT(EltTy, NumElts); local 964 if (!TLI->isTypeLegal(NewVT)) 965 NewVT = EltTy; 966 IntermediateVT = NewVT; 968 unsigned NewVTSize = NewVT.getSizeInBits(); 974 MVT DestVT = TLI->getRegisterType(NewVT); 976 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. 1419 EVT NewVT = EVT::getVectorVT(Context, EltTy, NumElts); local 1420 if (!isTypeLegal(NewVT)) 1421 NewVT [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64CallLowering.cpp | 299 MVT NewVT = TLI.getRegisterTypeForCallingConv(Ctx, CC, SplitEVTs[i]); local 300 if (EVT(NewVT) != SplitEVTs[i]) { 309 LLT NewLLT(NewVT); 311 CurArgInfo.Ty = EVT(NewVT).getTypeForEVT(Ctx); 314 if (NewVT.isVector()) {
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H A D | AArch64ISelLowering.h | 395 EVT NewVT) const override;
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H A D | AArch64ISelLowering.cpp | 2562 MVT NewVT = MVT::getVectorVT(MVT::f32, NumElts); local 2566 DAG.getNode(ISD::FP_EXTEND, dl, NewVT, Op.getOperand(0))); 2766 EVT NewVT = getExtensionTo64Bits(OrigTy); 2768 return DAG.getNode(ExtOpcode, SDLoc(N), NewVT, N); 8810 EVT NewVT) const { 8812 if (!TargetLoweringBase::shouldReduceLoadWidth(Load, ExtTy, NewVT)) 10516 MVT NewVT = MVT::getVectorVT(ElementTy, NumElems * 2); local 10520 DAG.getNode(N->getOpcode(), dl, NewVT, N->ops()),
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.h | 317 EVT NewVT) const override;
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H A D | HexagonISelLowering.cpp | 3280 ISD::LoadExtType ExtTy, EVT NewVT) const { 3282 if (!TargetLoweringBase::shouldReduceLoadWidth(Load, ExtTy, NewVT))
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 637 EVT NewVT) const { 639 if (!TargetLoweringBase::shouldReduceLoadWidth(N, ExtTy, NewVT)) 642 unsigned NewSize = NewVT.getStoreSizeInBits(); 2915 EVT NewVT = getEquivalentMemType(*DAG.getContext(), VT); 2918 = DAG.getLoad(NewVT, SL, LN->getChain(), 2966 EVT NewVT = getEquivalentMemType(*DAG.getContext(), VT); 2972 SDValue CastVal = DAG.getNode(ISD::BITCAST, SL, NewVT, Val);
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H A D | R600ISelLowering.cpp | 1820 EVT NewVT = MVT::v4i32; local 1823 NewVT = VT; 1826 SDValue Result = DAG.getBuildVector(NewVT, DL, makeArrayRef(Slots, NumElements));
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H A D | SIISelLowering.cpp | 4345 EVT NewVT = getEquivalentMemType(*DAG.getContext(), VT); local 4346 SDValue LHS = DAG.getNode(ISD::BITCAST, SL, NewVT, N->getOperand(1)); 4347 SDValue RHS = DAG.getNode(ISD::BITCAST, SL, NewVT, N->getOperand(2)); 4349 EVT SelectVT = NewVT; 4350 if (NewVT.bitsLT(MVT::i32)) { 4359 if (NewVT != SelectVT) 4360 NewSelect = DAG.getNode(ISD::TRUNCATE, SL, NewVT, NewSelect); 5559 EVT NewVT = NumVDataDwords > 1 ? local 5563 ResultTypes[0] = NewVT; 9373 EVT NewVT local [all...] |
H A D | AMDGPUISelDAGToDAG.cpp | 918 MVT NewVT = Opc == AMDGPUISD::CVT_PKRTZ_F16_F32 ? MVT::v2f16 : MVT::v2i16; local 919 N = CurDAG->MorphNodeTo(N, N->getOpcode(), CurDAG->getVTList(NewVT),
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetLowering.h | 1363 EVT NewVT) const { 1366 if (NewVT.isVector() && !Load->hasOneUse())
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.h | 1134 EVT NewVT) const override;
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H A D | X86ISelLowering.cpp | 5025 EVT NewVT) const { 8989 MVT NewVT = V0_LO.getSimpleValueType(); 8991 SDValue LO = DAG.getUNDEF(NewVT); 8992 SDValue HI = DAG.getUNDEF(NewVT); 8997 LO = DAG.getNode(X86Opcode, DL, NewVT, V0_LO, V0_HI); 8999 HI = DAG.getNode(X86Opcode, DL, NewVT, V1_LO, V1_HI); 9003 LO = DAG.getNode(X86Opcode, DL, NewVT, V0_LO, V1_LO); 9006 HI = DAG.getNode(X86Opcode, DL, NewVT, V0_HI, V1_HI); 12435 MVT NewVT = V.getSimpleValueType(); 12436 if (!NewVT [all...] |
/freebsd-11-stable/contrib/llvm-project/clang/lib/AST/ |
H A D | Decl.cpp | 2528 auto *NewVT = VarTemplate->getInstantiatedFromMemberTemplate(); local 2529 if (!NewVT) 2531 VarTemplate = NewVT;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCalls.cpp | 3364 VectorType *NewVT = cast<VectorType>(II->getType()); local 3367 CV0 = ConstantExpr::getIntegerCast(CV0, NewVT, /*isSigned=*/!Zext); 3368 CV1 = ConstantExpr::getIntegerCast(CV1, NewVT, /*isSigned=*/!Zext);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 7794 EVT NewVT = getVectorTyFromPredicateVector(VT); local 7812 return DAG.getNode(ISD::BITCAST, dl, NewVT, PredAsVector); 7843 EVT NewVT = PredAsVector.getValueType(); local 7846 SDValue Shuffled = DAG.getVectorShuffle(NewVT, dl, PredAsVector, 7847 DAG.getUNDEF(NewVT), ShuffleMask); 8276 EVT NewVT = NewV.getValueType(); 8278 for (unsigned i = 0, e = NewVT.getVectorNumElements(); i < e; i++, j++) { 8464 EVT NewVT = getExtensionTo64Bits(OrigTy); 8466 return DAG.getNode(ExtOpcode, SDLoc(N), NewVT, N);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 13043 EVT NewVT = TargetVT == MVT::v2i64 ? MVT::v2f64 : MVT::v4f32; local 13044 SDValue BV = DAG.getBuildVector(NewVT, dl, Ops);
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