Searched refs:NewVR (Results 1 - 10 of 10) sorted by relevance
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | MachineSSAUpdater.cpp | 121 Register NewVR = MRI->createVirtualRegister(RC); local 122 return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR); 225 unsigned NewVR = 0; local 228 NewVR = GetValueAtEndOfBlockInternal(SourceBB); 230 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); 233 U.setReg(NewVR);
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H A D | PeepholeOptimizer.cpp | 585 Register NewVR = MRI->createVirtualRegister(RC); local 587 TII->get(TargetOpcode::COPY), NewVR) 594 UseMO->setReg(NewVR); 765 Register NewVR = MRI.createVirtualRegister(NewRC); local 768 TII.get(TargetOpcode::PHI), NewVR);
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H A D | TargetInstrInfo.cpp | 829 Register NewVR = MRI.createVirtualRegister(RC); local 830 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); 839 BuildMI(*MF, Prev.getDebugLoc(), TII->get(Opcode), NewVR) 845 .addReg(NewVR, getKillRegState(true));
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.cpp | 4247 Register NewVR = MRI.createVirtualRegister(RC); local 4249 BuildMI(MF, Root.getDebugLoc(), TII->get(MnegOpc), NewVR) 4254 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); 4256 return NewVR; 4268 Register NewVR = local 4271 FMAInstKind::Accumulator, &NewVR); 4295 Register NewVR = local 4299 FMAInstKind::Indexed, &NewVR); 4430 Register NewVR = MRI.createVirtualRegister(OrrRC); local 4441 BuildMI(MF, Root.getDebugLoc(), TII->get(OrrOpc), NewVR) 4472 Register NewVR = MRI.createVirtualRegister(SubRC); local 4522 Register NewVR = MRI.createVirtualRegister(OrrRC); local 5022 Register NewVR = MRI.createVirtualRegister(RC); local 5069 Register NewVR = MRI.createVirtualRegister(RC); local 5129 Register NewVR = MRI.createVirtualRegister(RC); local 5149 Register NewVR = MRI.createVirtualRegister(RC); local 5169 Register NewVR = MRI.createVirtualRegister(RC); local [all...] |
H A D | AArch64ISelLowering.cpp | 13327 Register NewVR = MRI->createVirtualRegister(RC); local 13337 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) 13344 .addReg(NewVR);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonGenInsert.cpp | 1407 Register NewVR = MRI->createVirtualRegister(RC); 1408 RegMap[VR] = NewVR;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 2013 Register NewVR = MRI->createVirtualRegister(RC); local 2016 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) 2023 .addReg(NewVR);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 15409 Register NewVR = MRI->createVirtualRegister(RC); local 15419 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) 15426 .addReg(NewVR);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 17467 Register NewVR = MRI->createVirtualRegister(RC); local 17477 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) 17484 .addReg(NewVR);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | [all...] |
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