Searched refs:Load1 (Results 1 - 10 of 10) sorted by relevance
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.h | 381 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, 391 /// have already been scheduled after Load1. 392 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1,
|
H A D | X86InstrInfo.cpp | 5748 X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, argument 5750 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) 5752 unsigned Opc1 = Load1->getMachineOpcode(); 5923 return Load1->getOperand(I) == Load2->getOperand(I); 5936 auto Disp1 = dyn_cast<ConstantSDNode>(Load1->getOperand(X86::AddrDisp)); 5946 bool X86InstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, argument 5953 unsigned Opc1 = Load1->getMachineOpcode(); 5968 EVT VT = Load1->getValueType(0);
|
H A D | X86ISelLowering.cpp | [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.h | 245 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, 255 /// have already been scheduled after Load1. 256 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
|
H A D | ARMBaseInstrInfo.cpp | 1835 bool ARMBaseInstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, argument 1841 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) 1844 switch (Load1->getMachineOpcode()) { 1886 if (Load1->getOperand(0) != Load2->getOperand(0) || 1887 Load1->getOperand(4) != Load2->getOperand(4)) 1891 if (Load1->getOperand(3) != Load2->getOperand(3)) 1895 if (isa<ConstantSDNode>(Load1->getOperand(1)) && 1897 Offset1 = cast<ConstantSDNode>(Load1->getOperand(1))->getSExtValue(); 1912 /// have already been scheduled after Load1. 1916 bool ARMBaseInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNod argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetInstrInfo.h | 1218 virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, argument 1231 /// have already been scheduled after Load1. 1232 virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, argument
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIInstrInfo.h | 180 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, 193 bool shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, int64_t Offset0,
|
H A D | SIInstrInfo.cpp | 146 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, argument 149 if (!Load0->isMachineOpcode() || !Load1->isMachineOpcode()) 153 unsigned Opc1 = Load1->getMachineOpcode(); 162 if (getNumOperandsNoGlue(Load0) != getNumOperandsNoGlue(Load1)) 166 if (Load0->getOperand(0) != Load1->getOperand(0)) 184 Offset1 = cast<ConstantSDNode>(Load1->getOperand(Offset1Idx))->getZExtValue(); 194 assert(getNumOperandsNoGlue(Load0) == getNumOperandsNoGlue(Load1)); 197 if (Load0->getOperand(0) != Load1->getOperand(0)) 203 dyn_cast<ConstantSDNode>(Load1->getOperand(1)); 217 if (!nodesHaveSameOperandValue(Load0, Load1, AMDGP 504 shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, int64_t Offset0, int64_t Offset1, unsigned NumLoads) const argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLoweringHVX.cpp | 1508 SDValue Load1 = DAG.getLoad(SingleTy, dl, Chain, Base1, MOp1); local 1510 { DAG.getNode(ISD::CONCAT_VECTORS, dl, MemTy, Load0, Load1), 1512 Load0.getValue(1), Load1.getValue(1)) }, dl);
|
H A D | HexagonISelLowering.cpp | 2789 SDValue Load1 = DAG.getLoad(LoadTy, dl, Chain, Base1, WideMMO); local 2792 {Load1, Load0, BaseNoOff.getOperand(0)}); 2794 Load0.getValue(1), Load1.getValue(1));
|
Completed in 250 milliseconds