Searched refs:I1 (Results 1 - 25 of 57) sorted by relevance

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/freebsd-11-stable/contrib/binutils/opcodes/
H A Dmips16-opc.c61 #define I1 INSN_ISA1 macro
70 {"nop", "", 0x6500, 0xffff, RD_Z, 0, I1 }, /* move $0,$Z */
71 {"la", "x,A", 0x0800, 0xf800, WR_x|RD_PC, 0, I1 },
72 {"abs", "x,w", 0, (int) M_ABS, INSN_MACRO, 0, I1 },
73 {"addiu", "y,x,4", 0x4000, 0xf810, WR_y|RD_x, 0, I1 },
74 {"addiu", "x,k", 0x4800, 0xf800, WR_x|RD_x, 0, I1 },
75 {"addiu", "S,K", 0x6300, 0xff00, WR_SP|RD_SP, 0, I1 },
76 {"addiu", "S,S,K", 0x6300, 0xff00, WR_SP|RD_SP, 0, I1 },
77 {"addiu", "x,P,V", 0x0800, 0xf800, WR_x|RD_PC, 0, I1 },
78 {"addiu", "x,S,V", 0x0000, 0xf800, WR_x|RD_SP, 0, I1 },
[all...]
H A Dmips-opc.c82 #define I1 INSN_ISA1 macro
181 {"nop", "", 0x00000000, 0xffffffff, 0, INSN2_ALIAS, I1 }, /* sll */
184 {"li", "t,j", 0x24000000, 0xffe00000, WR_t, INSN2_ALIAS, I1 }, /* addiu */
185 {"li", "t,i", 0x34000000, 0xffe00000, WR_t, INSN2_ALIAS, I1 }, /* ori */
186 {"li", "t,I", 0, (int) M_LI, INSN_MACRO, 0, I1 },
187 {"move", "d,s", 0, (int) M_MOVE, INSN_MACRO, 0, I1 },
189 {"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d|RD_s, INSN2_ALIAS, I1 },/* addu */
190 {"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, INSN2_ALIAS, I1 },/* or */
191 {"b", "p", 0x10000000, 0xffff0000, UBD, INSN2_ALIAS, I1 },/* beq 0,0 */
192 {"b", "p", 0x04010000, 0xffff0000, UBD, INSN2_ALIAS, I1 },/* bge
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/MCA/Stages/
H A DInstructionTables.cpp50 for (unsigned I1 = 0; I1 < NumUnits; ++I1) {
51 unsigned SubUnitIdx = ProcResource.SubUnitsIdxBegin[I1];
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DPostDominators.cpp54 bool PostDominatorTree::dominates(const Instruction *I1, argument
56 assert(I1 && I2 && "Expecting valid I1 and I2");
58 const BasicBlock *BB1 = I1->getParent();
65 if (isa<PHINode>(I1) && isa<PHINode>(I2))
68 // Loop through the basic block until we find I1 or I2.
70 for (; &*I != I1 && &*I != I2; ++I)
H A DAliasAnalysisEvaluator.cpp141 for (SetVector<Value *>::iterator I1 = Pointers.begin(), E = Pointers.end();
142 I1 != E; ++I1) {
144 Type *I1ElTy = cast<PointerType>((*I1)->getType())->getElementType();
148 for (SetVector<Value *>::iterator I2 = Pointers.begin(); I2 != I1; ++I2) {
154 AliasResult AR = AA.alias(*I1, I1Size, *I2, I2Size);
157 PrintResults(AR, PrintNoAlias, *I1, *I2, F.getParent());
161 PrintResults(AR, PrintMayAlias, *I1, *I2, F.getParent());
165 PrintResults(AR, PrintPartialAlias, *I1, *I2, F.getParent());
169 PrintResults(AR, PrintMustAlias, *I1, *I
[all...]
H A DIVDescriptors.cpp537 Instruction *I1 =
540 if (!I1 || !I1->isBinaryOp())
544 if ((m_FAdd(m_Value(Op1), m_Value(Op2)).match(I1) ||
545 m_FSub(m_Value(Op1), m_Value(Op2)).match(I1)) &&
546 I1->isFast())
549 if (m_FMul(m_Value(Op1), m_Value(Op2)).match(I1) && (I1->isFast()))
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/ADT/
H A DAPSInt.h301 static bool isSameValue(const APSInt &I1, const APSInt &I2) { argument
302 return !compareValues(I1, I2);
306 static int compareValues(const APSInt &I1, const APSInt &I2) { argument
307 if (I1.getBitWidth() == I2.getBitWidth() && I1.isSigned() == I2.isSigned())
308 return I1.IsUnsigned ? I1.compare(I2) : I1.compareSigned(I2);
311 if (I1.getBitWidth() > I2.getBitWidth())
312 return compareValues(I1, I
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H A DAPInt.h675 static bool isSameValue(const APInt &I1, const APInt &I2) { argument
676 if (I1.getBitWidth() == I2.getBitWidth())
677 return I1 == I2;
679 if (I1.getBitWidth() > I2.getBitWidth())
680 return I1 == I2.zext(I1.getBitWidth());
682 return I1.zext(I2.getBitWidth()) == I2;
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/
H A DCodeMoverUtils.h25 /// Return true if \p I0 and \p I1 are control flow equivalent.
30 bool isControlFlowEquivalent(const Instruction &I0, const Instruction &I1,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonCopyToCombine.cpp91 MachineInstr *findPairable(MachineInstr &I1, bool &DoInsertAtI1,
96 void combine(MachineInstr &I1, MachineInstr &I2,
100 bool isSafeToMoveTogether(MachineInstr &I1, MachineInstr &I2,
261 /// isSafeToMoveTogether - Returns true if it is safe to move I1 next to I2 such
263 bool HexagonCopyToCombine::isSafeToMoveTogether(MachineInstr &I1, argument
270 // It is not safe to move I1 and I2 into one combine if I2 has a true
271 // dependence on I1.
272 if (I2UseReg && I1.modifiesRegister(I2UseReg, TRI))
277 // First try to move I2 towards I1.
279 // A reverse_iterator instantiated like below starts before I2, and I1
489 MachineInstr &I1 = *MI++; local
524 findPairable(MachineInstr &I1, bool &DoInsertAtI1, bool AllowC64) argument
573 combine(MachineInstr &I1, MachineInstr &I2, MachineBasicBlock::iterator &MI, bool DoInsertAtI1, bool OptForSize) argument
[all...]
H A DHexagonVectorLoopCarriedReuse.cpp48 // t1 = f(X2) <-- I1
66 // I1 (of X2) and I2 (of X1) that meet the following conditions.
67 // 1. I1 and I2 are the same operation, but with different operands.
69 // 3. All other operands Op1 of I1 and Op2 of I2 are also such that there is a
88 // We proceed until we cannot find any more such instructions I1 and I2.
300 DepChain *getDepChainBtwn(Instruction *I1, Instruction *I2, int Iters);
301 bool isEquivalentOperation(Instruction *I1, Instruction *I2);
402 bool HexagonVectorLoopCarriedReuse::isEquivalentOperation(Instruction *I1, argument
404 if (!I1->isSameOperationAs(I2))
410 if (CallInst *C1 = dyn_cast<CallInst>(I1)) {
719 getDepChainBtwn(Instruction *I1, Instruction *I2, int Iters) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/
H A DIdenticalExprChecker.cpp332 Expr::const_child_iterator I1 = Expr1->child_begin();
334 while (I1 != Expr1->child_end() && I2 != Expr2->child_end()) {
335 if (!*I1 || !*I2 || !isIdenticalStmt(Ctx, *I1, *I2, IgnoreSideEffects))
337 ++I1;
342 if (I1 != Expr1->child_end())
437 CompoundStmt::const_body_iterator I1 = CompStmt1->body_begin();
439 while (I1 != CompStmt1->body_end() && I2 != CompStmt2->body_end()) {
440 if (!isIdenticalStmt(Ctx, *I1, *I2, IgnoreSideEffects))
442 ++I1;
468 llvm::APInt I1 = IntLit1->getValue(); local
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/IR/
H A DInstruction.cpp380 static bool haveSameSpecialState(const Instruction *I1, const Instruction *I2, argument
382 assert(I1->getOpcode() == I2->getOpcode() &&
385 if (const AllocaInst *AI = dyn_cast<AllocaInst>(I1))
389 if (const LoadInst *LI = dyn_cast<LoadInst>(I1))
395 if (const StoreInst *SI = dyn_cast<StoreInst>(I1))
401 if (const CmpInst *CI = dyn_cast<CmpInst>(I1))
403 if (const CallInst *CI = dyn_cast<CallInst>(I1))
408 if (const InvokeInst *CI = dyn_cast<InvokeInst>(I1))
412 if (const CallBrInst *CI = dyn_cast<CallBrInst>(I1))
416 if (const InsertValueInst *IVI = dyn_cast<InsertValueInst>(I1))
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DCodeMoverUtils.cpp33 bool llvm::isControlFlowEquivalent(const Instruction &I0, const Instruction &I1, argument
36 return isControlFlowEquivalent(*I0.getParent(), *I1.getParent(), DT, PDT);
H A DSimplifyCFG.cpp1220 Instruction *I1, Instruction *I2) {
1225 if (BB1V != BB2V && (BB1V == I1 || BB2V == I2)) {
1251 Instruction *I1 = &*BB1_Itr++, *I2 = &*BB2_Itr++; local
1253 DbgInfoIntrinsic *DBI1 = dyn_cast<DbgInfoIntrinsic>(I1);
1256 while (isa<DbgInfoIntrinsic>(I1))
1257 I1 = &*BB1_Itr++;
1262 if (isa<PHINode>(I1) || !I1->isIdenticalToWhenDefined(I2) ||
1263 (isa<InvokeInst>(I1) && !isSafeToHoistInvoke(BB1, BB2, I1, I
1219 isSafeToHoistInvoke(BasicBlock *BB1, BasicBlock *BB2, Instruction *I1, Instruction *I2) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DPostDominators.h41 /// Return true if \p I1 dominates \p I2. This checks if \p I2 comes before
42 /// \p I1 if they belongs to the same basic block.
43 bool dominates(const Instruction *I1, const Instruction *I2) const;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DGVNHoist.cpp137 // A (CHI[{V, B, I1}, {V, C, I2}]
140 // B(I1) C (I2)
141 // The Value number for both I1 and I2 is V, the CHI node will save the
375 // Return true when I1 appears before I2 in the instructions of BB.
376 bool firstInBB(const Instruction *I1, const Instruction *I2) { argument
377 assert(I1->getParent() == I2->getParent());
378 unsigned I1DFS = DFSNumber.lookup(I1);
1092 for (Instruction &I1 : *BB) {
1093 // If I1 cannot guarantee progress, subsequent instructions
1095 if (!isGuaranteedToTransferExecutionToSuccessor(&I1)) {
[all...]
H A DLoopFuse.cpp869 /// Return false if the access functions of \p I0 and \p I1 could cause
872 Instruction &I1, bool EqualIsInvalid) {
874 Value *Ptr1 = getLoadStorePointerOperand(&I1);
922 /// Return true if the dependences between @p I0 (in @p L0) and @p I1 (in
927 Instruction &I1, bool AnyDep,
931 LLVM_DEBUG(dbgs() << "Check dep: " << I0 << " vs " << I1 << " : "
937 return accessDiffIsPositive(*FC0.L, *FC1.L, I0, I1, AnyDep);
939 auto DepResult = DI.depends(&I0, &I1, true);
962 return dependencesAllowFusion(FC0, FC1, I0, I1, AnyDep,
964 dependencesAllowFusion(FC0, FC1, I0, I1, AnyDe
871 accessDiffIsPositive(const Loop &L0, const Loop &L1, Instruction &I0, Instruction &I1, bool EqualIsInvalid) argument
925 dependencesAllowFusion(const FusionCandidate &FC0, const FusionCandidate &FC1, Instruction &I0, Instruction &I1, bool AnyDep, FusionDependenceAnalysisChoice DepChoice) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/
H A DDWARFVerifier.cpp63 auto I1 = Ranges.begin(), E1 = Ranges.end(); local
69 while (I1 != E1) {
70 bool Covered = I1->LowPC <= R.LowPC;
71 if (R.LowPC == R.HighPC || (Covered && R.HighPC <= I1->HighPC)) {
79 if (R.LowPC < I1->HighPC)
80 R.LowPC = I1->HighPC;
81 ++I1;
87 auto I1 = Ranges.begin(), E1 = Ranges.end(); local
89 while (I1 != E1 && I2 != E2) {
90 if (I1
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86OptimizeLEAs.cpp605 auto I1 = List.begin(); local
606 while (I1 != List.end()) {
607 MachineInstr &First = **I1;
608 auto I2 = std::next(I1);
677 ++I1;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFixSGPRCopies.cpp456 for (auto I1 = Defs.begin(), E = Defs.end(); I1 != E; ) {
457 MachineInstr *MI1 = *I1;
459 for (auto I2 = std::next(I1); I2 != E; ) {
512 ++I1;
534 ++I1;
540 ++I1;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMTargetStreamer.cpp74 const unsigned I1 = LittleEndian ? II + 1 : II + 0; local
76 Buffer[Size - II - 1] = uint8_t(Inst >> I1 * CHAR_BIT);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegAllocPBQP.cpp272 static bool lowestStartPoint(const IntervalInfo &I1, argument
276 return getStartPoint(I1) > getStartPoint(I2);
279 static bool lowestEndPoint(const IntervalInfo &I1, argument
281 SlotIndex E1 = getEndPoint(I1);
293 return std::get<0>(I1)->reg < std::get<0>(I2)->reg;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/DebugInfo/MSF/
H A DMappedBlockStream.cpp40 static Interval intersect(const Interval &I1, const Interval &I2) { argument
41 return std::make_pair(std::max(I1.first, I2.first),
42 std::min(I1.second, I2.second));
/freebsd-11-stable/libexec/getty/
H A Dgettytab.h120 #define I1 gettynums[17].value macro

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