| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSimplifyDemanded.cpp | 42 const APInt &Demanded) {
53 if (C->isSubsetOf(Demanded))
57 I->setOperand(OpNo, ConstantInt::get(Op->getType(), *C & Demanded));
1198 APInt Demanded, APInt &Undef) {
1201 if (Value *V = SimplifyDemandedVectorElts(Op, Demanded, Undef, Depth + 1)) {
41 ShrinkDemandedConstant(Instruction *I, unsigned OpNo, const APInt &Demanded) argument
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| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 3105 bool ShrinkDemandedConstant(SDValue Op, const APInt &Demanded,
3111 virtual bool targetShrinkDemandedConstant(SDValue Op, const APInt &Demanded, argument
3119 bool ShrinkDemandedOp(SDValue Op, unsigned BitWidth, const APInt &Demanded,
3128 /// be accurate for those bits in the Demanded masks.
3235 /// be accurate for those bits in the Demanded masks.
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 2807 APInt Demanded = APInt::getLowBitsSet(LHS.getValueSizeInBits(), 24); local
2812 SDValue DemandedLHS = DAG.GetDemandedBits(LHS, Demanded);
2813 SDValue DemandedRHS = DAG.GetDemandedBits(RHS, Demanded);
2822 if (TLI.SimplifyDemandedBits(LHS, Demanded, DCI))
2824 if (TLI.SimplifyDemandedBits(RHS, Demanded, DCI))
4082 APInt Demanded = APInt::getBitsSet(32, local
4090 if (TLI.ShrinkDemandedConstant(BitsFrom, Demanded, TLO) ||
4091 TLI.SimplifyDemandedBits(BitsFrom, Demanded, Known, TLO)) {
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| H A D | SIISelLowering.cpp | 9945 APInt Demanded = APInt::getBitsSet(32, 8 * Offset, 8 * Offset + 8); local
9951 if (TLI.SimplifyDemandedBits(Src, Demanded, Known, TLO)) {
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 328 bool targetShrinkDemandedConstant(SDValue Op, const APInt &Demanded,
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| H A D | AArch64ISelLowering.cpp | 965 const APInt &Demanded,
978 uint64_t DemandedBits = Demanded.getZExtValue();
1033 assert(((OldImm ^ NewImm) & Demanded.getZExtValue()) == 0 &&
1060 SDValue Op, const APInt &Demanded, TargetLoweringOpt &TLO) const {
1077 if (Demanded.countPopulation() == Size)
1098 return optimizeLogicalImm(Op, Size, Imm, Demanded, TLO, NewOpc);
964 optimizeLogicalImm(SDValue Op, unsigned Size, uint64_t Imm, const APInt &Demanded, TargetLowering::TargetLoweringOpt &TLO, unsigned NewOpc) argument
1059 targetShrinkDemandedConstant( SDValue Op, const APInt &Demanded, TargetLoweringOpt &TLO) const argument
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 417 bool targetShrinkDemandedConstant(SDValue Op, const APInt &Demanded,
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| H A D | ARMISelLowering.cpp | 15774 unsigned Demanded = DemandedAPInt.getZExtValue(); local
15775 unsigned ShrunkMask = Mask & Demanded;
15776 unsigned ExpandedMask = Mask | ~Demanded;
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 937 bool targetShrinkDemandedConstant(SDValue Op, const APInt &Demanded,
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| H A D | X86ISelLowering.cpp | [all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 494 bool TargetLowering::ShrinkDemandedConstant(SDValue Op, const APInt &Demanded, argument
500 if (targetShrinkDemandedConstant(Op, Demanded, TLO))
516 if (Opcode == ISD::XOR && Demanded.isSubsetOf(C))
519 if (!C.isSubsetOf(Demanded)) {
521 SDValue NewC = TLO.DAG.getConstant(Demanded & C, DL, VT);
537 const APInt &Demanded,
559 unsigned DemandedSize = Demanded.getActiveBits();
536 ShrinkDemandedOp(SDValue Op, unsigned BitWidth, const APInt &Demanded, TargetLoweringOpt &TLO) const argument
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