Searched refs:ArgReg (Results 1 - 15 of 15) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp301 Register ArgReg = Args[i].Regs[0];
342 MIRBuilder.buildCopy(ArgReg, Unmerge.getReg(0));
344 MIRBuilder.buildTrunc(ArgReg, {NewReg}).getReg(0);
357 Handler.assignValueToReg(ArgReg, VA.getLocReg(), VA);
374 Handler.assignValueToAddress(ArgReg, StackAddr, Size, MPO, VA);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp3327 unsigned ArgReg = ArgRegs[VA.getValNo()]; local
3339 bool Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg,
3340 ArgVT, ArgReg);
3352 ArgReg = fastEmitZExtFromI1(MVT::i8, ArgReg, /*TODO: Kill=*/false);
3355 if (ArgReg == 0)
3359 bool Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg,
3360 ArgVT, ArgReg);
3368 bool Emitted = X86FastEmitExtend(ISD::ANY_EXTEND, VA.getLocVT(), ArgReg,
3369 ArgVT, ArgReg);
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1202 unsigned ArgReg = getRegForValue(ArgVal); local
1203 if (!ArgReg)
1214 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false);
1215 if (!ArgReg)
1222 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true);
1223 if (!ArgReg)
1234 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg);
1271 // if (!emitStore(ArgVT, ArgReg, Add
[all...]
H A DMipsISelLowering.cpp3651 Register ArgReg = VA.getLocReg();
3656 unsigned Reg = addLiveIn(DAG.getMachineFunction(), ArgReg, RC);
3670 getNextIntArgReg(ArgReg), RC);
4344 unsigned ArgReg = ByValArgRegs[FirstReg + I]; local
4345 unsigned VReg = addLiveIn(MF, ArgReg, RC);
4383 unsigned ArgReg = ArgRegs[FirstReg + I]; local
4384 RegsToPass.push_back(std::make_pair(ArgReg, LoadVal));
4432 unsigned ArgReg = ArgRegs[FirstReg + I]; local
4433 RegsToPass.push_back(std::make_pair(ArgReg, Val));
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMIRYamlMapping.h385 static void mapping(IO &YamlIO, CallSiteInfo::ArgRegPair &ArgReg) { argument
386 YamlIO.mapRequired("arg", ArgReg.ArgNo);
387 YamlIO.mapRequired("reg", ArgReg.Reg);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp471 Register ArgReg = local
477 lowerParameter(B, ArgTy, ArgOffset, Align, ArgReg);
479 unpackRegs(OrigArgRegs, ArgReg, ArgTy, B);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DMIRPrinter.cpp483 for (auto ArgReg : CSInfo.second) {
485 YmlArgReg.ArgNo = ArgReg.ArgNo;
486 printRegMIR(ArgReg.Reg, YmlArgReg.Reg, TRI);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumb1FrameLowering.cpp844 for (unsigned ArgReg : {ARM::R0, ARM::R1, ARM::R2, ARM::R3})
845 if (!MF.getRegInfo().isLiveIn(ArgReg))
846 CopyRegs[ArgReg] = true;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1472 unsigned ArgReg; local
1474 ArgReg = NextFPR++;
1478 ArgReg = NextGPR++;
1481 TII.get(TargetOpcode::COPY), ArgReg).addReg(Arg);
1482 RegArgs.push_back(ArgReg);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp3083 unsigned ArgReg = getRegForValue(ArgVal); local
3084 if (!ArgReg)
3094 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false);
3095 if (!ArgReg)
3104 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true);
3105 if (!ArgReg)
3116 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg);
3145 if (!emitStore(ArgVT, ArgReg, Add
[all...]
H A DAArch64ISelLowering.cpp4127 [&VA](MachineFunction::ArgRegPair ArgReg) {
4128 return ArgReg.Reg == VA.getLocReg();
/freebsd-11-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DBugReporterVisitors.cpp2781 const MemRegion *ArgReg = Call->getArgSVal(Idx).getAsRegion(); local
2785 if ( !ArgReg || !R->isSubRegionOf(ArgReg->StripCasts()))
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFastISel.cpp879 for (unsigned ArgReg : Args)
880 MIB.addReg(ArgReg);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfDebug.cpp565 for (auto ArgReg : CallFwdRegsInfo->second) {
566 bool InsertedReg = ForwardedRegWorklist.insert(ArgReg.Reg).second;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp96 unsigned ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg(); local
97 if (MRI.getLiveInPhysReg(ArgReg) != Reg)

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