Searched refs:A0 (Results 1 - 25 of 40) sorted by relevance

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/freebsd-11-stable/lib/libc/stdlib/
H A Da64l.c20 #define A0 48 /* ASCII '0' */ macro
35 else if (*s <= A0 + 9)
36 digit = *s - A0 + 2;
/freebsd-11-stable/crypto/openssl/crypto/bn/asm/
H A Dx86_64-mont5.pl1048 my @A0=("%r10","%r11");
1267 mov %rax,$A0[0] # a[1]*a[0]
1269 mov %rdx,$A0[1]
1270 mov $A0[0],-24($tptr,$i) # t[1]
1273 add %rax,$A0[1]
1276 mov $A0[1],-16($tptr,$i) # t[2]
1277 mov %rdx,$A0[0]
1288 add %rax,$A0[0] # a[3]*a[0]+a[2]*a[1]+t[3]
1290 mov %rdx,$A0[1]
1291 adc \$0,$A0[
[all...]
H A Darmv4-mont.pl250 my ($A0,$A1,$A2,$A3)=map("d$_",(0..3));
277 vld1.32 {$A0-$A3}, [$aptr]! @ can't specify :32 :-(
285 vmull.u32 $A0xB,$Bi,${A0}[0]
286 vmull.u32 $A1xB,$Bi,${A0}[1]
338 vmlal.u32 $A0xB,$Bi,${A0}[0]
339 vmlal.u32 $A1xB,$Bi,${A0}[1]
393 vld1.32 {$A0-$A3}, [$aptr]!
407 vmull.u32 $A0xB,$Bi,${A0}[0]
409 vmull.u32 $A1xB,$Bi,${A0}[1]
454 vld1.32 {$A0
[all...]
H A Dppc64-mont.pl164 $A0="f10"; $A1="f11"; $A2="f12"; $A3="f13";
386 lfd $A0,`$FRAME+64`($sp)
394 fcfid $A0,$A0
407 stfd $A0,8($nap_d) ; save a[j] in double format
417 fmul $T0a,$A0,$ba
418 fmul $T0b,$A0,$bb
422 fmadd $T1a,$A0,$bc,$T1a
423 fmadd $T1b,$A0,$bd,$T1b
525 lfd $A0,`
[all...]
/freebsd-11-stable/contrib/llvm-project/lldb/include/lldb/Utility/
H A DSharingPtr.h83 template <class A0> shared_ptr_emplace(A0 &a0) : data_(a0) {}
85 template <class A0, class A1>
86 shared_ptr_emplace(A0 &a0, A1 &a1) : data_(a0, a1) {}
88 template <class A0, class A1, class A2>
89 shared_ptr_emplace(A0 &a0, A1 &a1, A2 &a2) : data_(a0, a1, a2) {}
91 template <class A0, class A1, class A2, class A3>
92 shared_ptr_emplace(A0 &a0, A1 &a1, A2 &a2, A3 &a3) : data_(a0, a1, a2, a3) {}
94 template <class A0, class A1, class A2, class A3, class A4>
95 shared_ptr_emplace(A0
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DMergedLoadStoreMotion.cpp231 auto *A0 = dyn_cast<Instruction>(S0->getPointerOperand()); local
233 return A0 && A1 && A0->isIdenticalTo(A1) && A0->hasOneUse() &&
234 (A0->getParent() == S0->getParent()) && A1->hasOneUse() &&
235 (A1->getParent() == S1->getParent()) && isa<GetElementPtrInst>(A0);
246 auto *A0 = dyn_cast<Instruction>(S0->getPointerOperand()); local
259 Instruction *ANew = A0->clone();
263 assert(S0->getParent() == A0->getParent());
271 A0
[all...]
/freebsd-11-stable/contrib/gdb/gdb/
H A Ddpx2-nat.c37 /* symbols like 'A0' come from <sys/reg.h> */
41 A0, A1, A2, A3, A4, A5, A6, SP,
/freebsd-11-stable/lib/libc/mips/gen/
H A Dmakecontext.c96 mc->mc_regs[A0 + i] = va_arg(ap, register_t);
104 mc->mc_regs[A0 + i] = va_arg(ap, register_t);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsABIInfo.cpp26 static const MCPhysReg O32IntRegs[4] = {Mips::A0, Mips::A1, Mips::A2, Mips::A3};
120 Mips::A0, Mips::A1, Mips::A2, Mips::A3
H A DMipsMCCodeEmitter.cpp1093 else if (MI.getOperand(0).getReg() == Mips::A0 &&
1096 else if (MI.getOperand(0).getReg() == Mips::A0 &&
1099 else if (MI.getOperand(0).getReg() == Mips::A0 &&
1102 else if (MI.getOperand(0).getReg() == Mips::A0 &&
1105 else if (MI.getOperand(0).getReg() == Mips::A0 &&
/freebsd-11-stable/usr.bin/truss/
H A Dmips-freebsd.c74 reg = A0;
/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DInfoByHwMode.cpp172 const RegSizeInfo &A0 = get(M0); local
174 return std::tie(A0.SpillSize, A0.SpillAlignment) >
/freebsd-11-stable/sys/mips/include/
H A Dregnum.h58 #define A0 4 macro
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMicroMipsSizeReduction.cpp380 Mips::AT, Mips::V0, Mips::V1, Mips::A0, Mips::A1, Mips::A2, Mips::A3,
587 if (Reg == Mips::A0 || Reg == Mips::A1 || Reg == Mips::A2 ||
598 if ((R0 == Mips::A0 && R1 == Mips::S5) ||
599 (R0 == Mips::A0 && R1 == Mips::S6) ||
600 (R0 == Mips::A0 && R1 == Mips::A1) ||
601 (R0 == Mips::A0 && R1 == Mips::A2) ||
602 (R0 == Mips::A0 && R1 == Mips::A3) ||
H A DMipsAsmPrinter.cpp926 EmitInstrRegReg(STI, MovOpc, Mips::A0, Mips::F12);
929 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F14, LE);
932 EmitInstrRegReg(STI, MovOpc, Mips::A0, Mips::F12);
936 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
939 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
943 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
969 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F2, Mips::F3, LE);
H A DMipsCallLowering.cpp142 if (VT == MVT::f64 && PhysReg >= Mips::A0 && PhysReg <= Mips::A3) {
156 } else if (VT == MVT::f32 && PhysReg >= Mips::A0 && PhysReg <= Mips::A3) {
257 if (VT == MVT::f64 && PhysReg >= Mips::A0 && PhysReg <= Mips::A3) {
274 } else if (VT == MVT::f32 && PhysReg >= Mips::A0 && PhysReg <= Mips::A3) {
H A DMips16InstrInfo.cpp261 adjustStackPtrBig(SP, Remainder, MBB, I, Mips::A0, Mips::A1);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DSanitizerCoverage.cpp818 Value *A0 = ICMP->getOperand(0); local
820 if (!A0->getType()->isIntegerTy())
822 uint64_t TypeSize = DL->getTypeStoreSizeInBits(A0->getType());
828 // __sanitizer_cov_trace_cmp((type_size << 32) | predicate, A0, A1);
830 bool FirstIsConst = isa<ConstantInt>(A0);
838 std::swap(A0, A1);
842 IRB.CreateCall(CallbackFunc, {IRB.CreateIntCast(A0, Ty, true),
/freebsd-11-stable/contrib/ntp/libparse/
H A Ddata_mbg.c328 if (fetch_ieee754(buffpp, IEEE_DOUBLE, &utcp->A0, mbg_double) != IEEE_OK)
330 L_CLR(&utcp->A0);
/freebsd-11-stable/sys/mips/mips/
H A Dexception.S281 SAVE_REG(a0, A0, sp) ;\
342 RESTORE_REG(a0, A0, sp) ;\
440 SAVE_U_PCB_REG(a0, A0, k1)
536 RESTORE_U_PCB_REG(a0, A0, k1)
701 SAVE_U_PCB_REG(a0, A0, k1)
820 RESTORE_U_PCB_REG(a0, A0, k1)
H A Dswtch.S105 RESTORE_U_PCB_REG(a0, A0, k1)
/freebsd-11-stable/contrib/ntp/include/
H A Dmbg_gps166.h802 * t0t, A0 and A1 contain fractional correction parameters for the current
827 * @note In the original code the type of A0 and A1 is double.
835 l_fp A0; ///< +- Clock Correction Coefficient 0 [sec] member in struct:__anon4764
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZMCTargetDesc.cpp114 SystemZ::A0, SystemZ::A1, SystemZ::A2, SystemZ::A3,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp245 // A0 and A1 hold the thread pointer.
246 Reserved.set(SystemZ::A0);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp2519 Inst.addOperand(MCOperand::createReg(Mips::A0));
2523 Inst.addOperand(MCOperand::createReg(Mips::A0));
2527 Inst.addOperand(MCOperand::createReg(Mips::A0));
2531 Inst.addOperand(MCOperand::createReg(Mips::A0));
2535 Inst.addOperand(MCOperand::createReg(Mips::A0));

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