Searched refs:reset_mask (Results 1 - 5 of 5) sorted by relevance

/freebsd-10.3-release/sys/dev/drm2/radeon/
H A Dni.c1482 static int cayman_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) argument
1487 reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE);
1490 reset_mask &= ~RADEON_RESET_DMA;
1492 if (reset_mask == 0)
1495 dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask);
1511 if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE))
1514 if (reset_mask & RADEON_RESET_DMA)
H A Devergreen.c2532 static int evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) argument
2537 reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE);
2540 reset_mask &= ~RADEON_RESET_DMA;
2542 if (reset_mask == 0)
2545 dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask);
2552 if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE))
2555 if (reset_mask & RADEON_RESET_DMA)
H A Dr600.c1389 static int r600_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) argument
1394 reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE);
1397 reset_mask &= ~RADEON_RESET_DMA;
1399 if (reset_mask == 0)
1402 dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask);
1409 if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE))
1412 if (reset_mask & RADEON_RESET_DMA)
H A Dsi.c2267 static int si_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) argument
2272 reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE);
2275 reset_mask &= ~RADEON_RESET_DMA;
2277 if (reset_mask == 0)
2280 dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask);
2292 if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE))
2295 if (reset_mask & RADEON_RESET_DMA)
/freebsd-10.3-release/sys/dev/aacraid/
H A Daacraid.c3722 u_int32_t status, reset_mask, waitCount, max_msix_orig; local
3790 AAC_IOP_RESET_ALWAYS, 0, 0, 0, 0, &status, &reset_mask)) != 0) {
3817 AAC_MEM0_SETREG4(sc, AAC_SRC_IDBR, reset_mask);

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