| /freebsd-10.3-release/lib/libmp/tests/ |
| H A D | legacy_test.c | 35 MINT *c0, *c1, *c2, *c3, *c5, *c6, *c8, *c10, *c14, *c15, *c25, \ variable
130 mp_mult(c3, c14, t0);
171 c14 = mp_itom(14);
200 mp_mfree(c14);
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| /freebsd-10.3-release/sys/arm/arm/ |
| H A D | cpufunc_asm_armv6.S | 100 mcrr p15, 0, r1, r0, c14 /* clean and invaliate D cache range */
124 mcrr p15, 0, r1, r0, c14 /* clean & invaliate D cache range */
141 mcr p15, 0, r0, c7, c14, 0 /* clean & invalidate D cache */
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| H A D | cpufunc_asm_fa526.S | 43 mcr p15, 0, r1, c7, c14, 0 /* clean and invalidate D$ */
94 mcr p15, 0, r0, c7, c14, 0 /* clean and invalidate D$ */
108 mcr p15, 0, r0, c7, c14, 0 /* clean and invalidate D$ */
124 1: mcr p15, 0, r0, c7, c14, 1 /* clean and invalidate D$ entry */
175 1: mcr p15, 0, r0, c7, c14, 1 /* clean and invalidate D$ entry */
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| H A D | cpufunc_asm_arm11x6.S | 104 mcr p15, 0, reg, c7, c14, 0;/* Clean and Invalidate Entire Data Cache */ \
109 mcr p15, 0, reg, c7, c14, 0;/* Clean and Invalidate Entire Data Cache */ \
195 mcrr p15, 0, r1, r0, c14 /* clean and invalidate D cache range */
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| H A D | cpufunc_asm_armv5_ec.S | 61 1: mrc p15, 0, r15, c7, c14, 3 /* Test, clean and invalidate DCache */
147 mcr p15, 0, r0, c7, c14, 1 /* Purge D cache SE with VA */
190 mcr p15, 0, r0, c7, c14, 1 /* Purge D cache SE with VA */
211 1: mrc p15, 0, r15, c7, c14, 3 /* Test, clean and invalidate DCache */
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| H A D | cpufunc_asm_armv5.S | 145 mcr p15, 0, r0, c7, c14, 1 /* Purge D cache SE with VA */
188 mcr p15, 0, r0, c7, c14, 1 /* Purge D cache SE with VA */
213 mcr p15, 0, ip, c7, c14, 2 /* Purge D cache SE with Set/Index */
217 mcr p15, 0, ip, c7, c14, 2 /* Purge D cache SE with Set/Index */
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| H A D | cpufunc_asm_arm10.S | 153 mcr p15, 0, r0, c7, c14, 1 /* Purge D cache SE with VA */
194 mcr p15, 0, r0, c7, c14, 1 /* Purge D cache SE with VA */
219 mcr p15, 0, ip, c7, c14, 2 /* Purge D cache SE with Set/Index */
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| H A D | cpufunc_asm_arm9.S | 144 mcr p15, 0, r0, c7, c14, 1 /* Purge D cache SE with VA */
183 mcr p15, 0, r0, c7, c14, 1 /* Purge D cache SE with VA */
207 mcr p15, 0, ip, c7, c14, 2 /* Purge D cache SE with Set/Index */
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| H A D | cpufunc_asm_xscale_c3.S | 160 mcr p15, 0, r3, c7, c14, 2 /* clean and invalidate */
186 1: mcr p15, 0, r0, c7, c14, 1 /* clean/invalidate L1 D cache entry */
229 1: mcr p15, 0, r0, c7, c14, 1 /* Clean and invalidate D cache entry */
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| H A D | cpufunc_asm_sheeva.S | 51 1: mrc p15, 0, r15, c7, c14, 3 /* Test, clean and invalidate DCache */
188 mcr p15, 5, r0, c15, c14, 0 /* Inv zone start address */
189 mcr p15, 5, r2, c15, c14, 1 /* Inv zone end address */
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| /freebsd-10.3-release/sys/arm/include/ |
| H A D | sysreg.h | 184 #define CP15_DCCIALL p15, 0, r0, c7, c14, 0 /* Data cache clean and invalidate all */
186 #define CP15_DCCIMVAC(rr) p15, 0, rr, c7, c14, 1 /* Data cache clean and invalidate by MVA PoC */
187 #define CP15_DCCISW(rr) p15, 0, rr, c7, c14, 2 /* Data cache clean and invalidate by set/way */
224 #define CP15_PMUSERENR(rr) p15, 0, rr, c9, c14, 0 /* PM User Enable Register */
225 #define CP15_PMINTENSET(rr) p15, 0, rr, c9, c14, 1 /* PM Interrupt Enable Set Register */
226 #define CP15_PMINTENCLR(rr) p15, 0, rr, c9, c14, 2 /* PM Interrupt Enable Clear Register */
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