Searched refs:AR_PHY_TIMING_CTRL4 (Results 1 - 11 of 11) sorted by relevance
| /freebsd-10.3-release/sys/dev/ath/ath_hal/ar5211/ |
| H A D | ar5211phy.h | 54 #define AR_PHY_TIMING_CTRL4 0x9920 /* PHY */ macro
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| H A D | ar5211_reset.c | 477 OS_REG_WRITE(ah, AR_PHY_TIMING_CTRL4,
660 !(OS_REG_READ(ah, AR_PHY_TIMING_CTRL4) & AR_PHY_TIMING_CTRL4_DO_IQCAL)) {
698 data = OS_REG_READ(ah, AR_PHY_TIMING_CTRL4) |
702 OS_REG_WRITE(ah, AR_PHY_TIMING_CTRL4, data);
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| /freebsd-10.3-release/sys/dev/ath/ath_hal/ar5416/ |
| H A D | ar5416_cal_iq.c | 130 OS_REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4,
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| H A D | ar5416_cal.c | 100 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
128 OS_REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4, AR_PHY_TIMING_CTRL4_DO_CAL);
172 if (!ath_hal_wait(ah, AR_PHY_TIMING_CTRL4, AR_PHY_TIMING_CTRL4_DO_CAL, 0)) {
403 if (!(OS_REG_READ(ah, AR_PHY_TIMING_CTRL4) & AR_PHY_TIMING_CTRL4_DO_CAL)) {
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| H A D | ar5416phy.h | 146 (AR_PHY_TIMING_CTRL4 + ((_i) << 12))
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| H A D | ar5416_reset.c | 1630 OS_REG_WRITE(ah, AR_PHY_TIMING_CTRL4 + regChainOffset,
1631 (OS_REG_READ(ah, AR_PHY_TIMING_CTRL4 + regChainOffset) &
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| /freebsd-10.3-release/sys/dev/ath/ath_hal/ar5212/ |
| H A D | ar5212_reset.c | 540 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
543 OS_REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4,
998 !(OS_REG_READ(ah, AR_PHY_TIMING_CTRL4) & AR_PHY_TIMING_CTRL4_DO_IQCAL)) {
1015 OS_REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4,
1054 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
1056 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
1058 OS_REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4,
1073 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
1076 OS_REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4,
1718 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
[all...] |
| H A D | ar5212phy.h | 162 #define AR_PHY_TIMING_CTRL4 0x9920 /* timing control */ macro
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| /freebsd-10.3-release/tools/tools/ath/common/ |
| H A D | dumpregs_5211.c | 274 DEFVOID(AR_PHY_TIMING_CTRL4,"PHY_TIMING_CTRL4"),
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| H A D | dumpregs_5212.c | 373 DEFVOID(AR_PHY_TIMING_CTRL4,"PHY_TIMING_CTRL4"),
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| /freebsd-10.3-release/sys/dev/ath/ath_hal/ar5312/ |
| H A D | ar5312_reset.c | 465 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
468 OS_REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4,
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