Searched refs:OperIdx (Results 1 - 4 of 4) sorted by relevance
| /freebsd-10.2-release/contrib/llvm/include/llvm/CodeGen/ |
| H A D | ScheduleDAGInstrs.h | 232 void addPhysRegDataDeps(SUnit *SU, unsigned OperIdx);
233 void addPhysRegDeps(SUnit *SU, unsigned OperIdx);
234 void addVRegDefDeps(SUnit *SU, unsigned OperIdx);
235 void addVRegUseDeps(SUnit *SU, unsigned OperIdx);
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| /freebsd-10.2-release/contrib/llvm/lib/CodeGen/ |
| H A D | ScheduleDAGInstrs.cpp | 243 void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) { argument
244 const MachineOperand &MO = SU->getInstr()->getOperand(OperIdx);
274 SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, RegUse,
285 /// depend the physical register referenced at OperIdx.
286 void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) { argument
288 const MachineOperand &MO = MI->getOperand(OperIdx);
313 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr()));
325 Uses.insert(PhysRegSUOper(SU, OperIdx, MO.getReg()));
328 addPhysRegDataDeps(SU, OperIdx);
355 Defs.insert(PhysRegSUOper(SU, OperIdx, Re
365 addVRegDefDeps(SUnit *SU, unsigned OperIdx) argument
403 addVRegUseDeps(SUnit *SU, unsigned OperIdx) argument
[all...] |
| /freebsd-10.2-release/contrib/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyIndVar.cpp | 91 unsigned OperIdx = 0; local
100 if (IVOperand != UseInst->getOperand(OperIdx) ||
137 UseInst->setOperand(OperIdx, IVSrc);
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| /freebsd-10.2-release/contrib/llvm/utils/TableGen/ |
| H A D | CodeGenSchedule.cpp | 1175 unsigned OperIdx = RWSequences.size()-1;
1180 RWSequences.push_back(RWSequences[OperIdx]);
1187 RWI != RWE; ++RWI, ++OperIdx) {
1193 RWSequences[OperIdx].insert(RWSequences[OperIdx].end(),
1196 assert(OperIdx == RWSequences.size() && "missed a sequence");
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