Searched refs:crtc_base (Results 1 - 6 of 6) sorted by relevance

/freebsd-10.1-release/sys/dev/drm2/radeon/
H A Drv770.c46 u32 rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) argument
58 WREG32(D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base));
59 WREG32(D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base));
61 WREG32(D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base));
62 WREG32(D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base));
65 (u32)crtc_base);
67 (u32)crtc_base);
H A Dradeon_asic.h144 extern u32 r100_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
242 extern u32 rs600_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
405 u32 rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
448 extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
H A Drs600.c91 u32 rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) argument
103 (u32)crtc_base);
105 (u32)crtc_base);
H A Devergreen.c174 * @crtc_base: new address of the crtc (GPU MC address)
182 u32 evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) argument
194 upper_32_bits(crtc_base));
196 (u32)crtc_base);
199 upper_32_bits(crtc_base));
201 (u32)crtc_base);
H A Dradeon.h1289 u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base);
H A Dr100.c141 * @crtc_base: new address of the crtc (GPU MC address)
149 u32 r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) argument
152 u32 tmp = ((u32)crtc_base) | RADEON_CRTC_OFFSET__OFFSET_LOCK;

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