/freebsd-10.1-release/contrib/llvm/lib/Target/ARM/InstPrinter/ |
H A D | ARMInstPrinter.h | 39 void printSORegRegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 40 void printSORegImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 42 void printAddrModeTBB(const MCInst *MI, unsigned OpNum, raw_ostream &O); 43 void printAddrModeTBH(const MCInst *MI, unsigned OpNum, raw_ostream &O); 44 void printAddrMode2Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 45 void printAM2PostIndexOp(const MCInst *MI, unsigned OpNum, raw_ostream &O); 46 void printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum, 48 void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum, 51 void printAddrMode3Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 52 void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum, [all...] |
H A D | ARMInstPrinter.cpp | 325 void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum, argument 327 const MCOperand &MO1 = MI->getOperand(OpNum); 358 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum, 360 const MCOperand &MO1 = MI->getOperand(OpNum); 361 const MCOperand &MO2 = MI->getOperand(OpNum+1); 362 const MCOperand &MO3 = MI->getOperand(OpNum+2); 377 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum, 379 const MCOperand &MO1 = MI->getOperand(OpNum); 380 const MCOperand &MO2 = MI->getOperand(OpNum+1); 467 unsigned OpNum, [all...] |
/freebsd-10.1-release/contrib/llvm/lib/Target/AArch64/InstPrinter/ |
H A D | AArch64InstPrinter.h | 40 void printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, argument 42 printAddrRegExtendOperand(MI, OpNum, O, MemSize, RmSize); 46 void printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, 51 unsigned OpNum, raw_ostream &O); 53 unsigned OpNum, raw_ostream &O); 55 void printBareImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 58 void printBFILSBOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 59 void printBFIWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 60 void printBFXWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 63 void printCondCodeOperand(const MCInst *MI, unsigned OpNum, 77 printOffsetUImm12Operand(const MCInst *MI, unsigned OpNum, raw_ostream &o) argument 93 printNamedImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 95 printNamedImmOperand(SomeNamedImmMapper(), MI, OpNum, O); local 106 printMRSOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 108 printSysRegOperand(A64SysReg::MRSMapper(), MI, OpNum, O); local 111 printMSROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 113 printSysRegOperand(A64SysReg::MSRMapper(), MI, OpNum, O); local 121 printLSROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 124 printASROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 127 printROROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 132 printShiftOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 152 printRegExtendOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument [all...] |
H A D | AArch64InstPrinter.cpp | 54 unsigned OpNum, raw_ostream &O) { 55 const MCOperand &MOImm = MI->getOperand(OpNum); 62 AArch64InstPrinter::printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, argument 65 unsigned ExtImm = MI->getOperand(OpNum).getImm(); 93 unsigned OpNum, raw_ostream &O) { 94 const MCOperand &Imm12Op = MI->getOperand(OpNum); 107 AArch64InstPrinter::printAddSubImmLSL12Operand(const MCInst *MI, unsigned OpNum, argument 110 printAddSubImmLSL0Operand(MI, OpNum, O); 116 AArch64InstPrinter::printBareImmOperand(const MCInst *MI, unsigned OpNum, argument 118 const MCOperand &MO = MI->getOperand(OpNum); 53 printOffsetSImm9Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 92 printAddSubImmLSL0Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 123 printBFILSBOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 131 printBFIWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 140 printBFXWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 154 printCRxOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 163 printCVTFixedPosOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 171 printFPImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &o) argument 199 printFPZeroOperand(const MCInst *MI, unsigned OpNum, raw_ostream &o) argument 205 printCondCodeOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 213 printLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 232 printLogicalImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 242 printOffsetUImm12Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O, int MemSize) argument 256 printShiftOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O, A64SE::ShiftExtSpecifiers Shift) argument 277 printMoveWideImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 294 printNamedImmOperand(const NamedImmMapper &Mapper, const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 308 printSysRegOperand(const A64SysReg::SysRegMapper &Mapper, const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 322 printRegExtendOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O, A64SE::ShiftExtSpecifiers Ext) argument 363 printSImm7ScaledOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 419 printNeonMovImmShiftOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 460 printNeonUImm0Operand(const MCInst *MI, unsigned OpNum, raw_ostream &o) argument 465 printUImmHexOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 478 printUImmBareOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 490 printNeonUImm64MaskOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 516 printVectorList(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument [all...] |
/freebsd-10.1-release/contrib/llvm/lib/Target/SystemZ/InstPrinter/ |
H A D | SystemZInstPrinter.h | 48 void printOperand(const MCInst *MI, int OpNum, raw_ostream &O); 49 void printBDAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 50 void printBDXAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 51 void printBDLAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 52 void printU4ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O); 53 void printU6ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O); 54 void printS8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O); 55 void printU8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O); 56 void printS16ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O); 57 void printU16ImmOperand(const MCInst *MI, int OpNum, raw_ostrea [all...] |
H A D | SystemZInstPrinter.cpp | 54 void SystemZInstPrinter::printU4ImmOperand(const MCInst *MI, int OpNum, argument 56 int64_t Value = MI->getOperand(OpNum).getImm(); 61 void SystemZInstPrinter::printU6ImmOperand(const MCInst *MI, int OpNum, argument 63 int64_t Value = MI->getOperand(OpNum).getImm(); 68 void SystemZInstPrinter::printS8ImmOperand(const MCInst *MI, int OpNum, argument 70 int64_t Value = MI->getOperand(OpNum).getImm(); 75 void SystemZInstPrinter::printU8ImmOperand(const MCInst *MI, int OpNum, argument 77 int64_t Value = MI->getOperand(OpNum).getImm(); 82 void SystemZInstPrinter::printS16ImmOperand(const MCInst *MI, int OpNum, argument 84 int64_t Value = MI->getOperand(OpNum) 89 printU16ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument 96 printS32ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument 103 printU32ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument 110 printAccessRegOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument 156 printCond4Operand(const MCInst *MI, int OpNum, raw_ostream &O) argument [all...] |
/freebsd-10.1-release/contrib/llvm/lib/Target/SystemZ/MCTargetDesc/ |
H A D | SystemZMCCodeEmitter.cpp | 55 uint64_t getBDAddr12Encoding(const MCInst &MI, unsigned OpNum, 57 uint64_t getBDAddr20Encoding(const MCInst &MI, unsigned OpNum, 59 uint64_t getBDXAddr12Encoding(const MCInst &MI, unsigned OpNum, 61 uint64_t getBDXAddr20Encoding(const MCInst &MI, unsigned OpNum, 63 uint64_t getBDLAddr12Len8Encoding(const MCInst &MI, unsigned OpNum, 66 // Operand OpNum of MI needs a PC-relative fixup of kind Kind at 70 uint64_t getPCRelEncoding(const MCInst &MI, unsigned OpNum, 74 uint64_t getPC16DBLEncoding(const MCInst &MI, unsigned OpNum, argument 76 return getPCRelEncoding(MI, OpNum, Fixups, SystemZ::FK_390_PC16DBL, 2); 78 uint64_t getPC32DBLEncoding(const MCInst &MI, unsigned OpNum, argument 116 getBDAddr12Encoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups) const argument 125 getBDAddr20Encoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups) const argument 134 getBDXAddr12Encoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups) const argument 144 getBDXAddr20Encoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups) const argument 155 getBDLAddr12Len8Encoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups) const argument 165 getPCRelEncoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, unsigned Kind, int64_t Offset) const argument [all...] |
/freebsd-10.1-release/contrib/llvm/lib/Target/MSP430/ |
H A D | MSP430AsmPrinter.cpp | 49 void printOperand(const MachineInstr *MI, int OpNum, 51 void printSrcMemOperand(const MachineInstr *MI, int OpNum, 64 void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum, argument 66 const MachineOperand &MO = MI->getOperand(OpNum); 111 void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum, argument 113 const MachineOperand &Base = MI->getOperand(OpNum); 114 const MachineOperand &Disp = MI->getOperand(OpNum+1); 121 printOperand(MI, OpNum+1, O, "nohash"); 126 printOperand(MI, OpNum, O);
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/freebsd-10.1-release/contrib/llvm/lib/Target/NVPTX/InstPrinter/ |
H A D | NVPTXInstPrinter.h | 39 void printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O, 41 void printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O, 43 void printLdStCode(const MCInst *MI, int OpNum, 45 void printMemOperand(const MCInst *MI, int OpNum, 47 void printProtoIdent(const MCInst *MI, int OpNum,
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H A D | NVPTXInstPrinter.cpp | 95 void NVPTXInstPrinter::printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O, argument 97 const MCOperand &MO = MI->getOperand(OpNum); 145 void NVPTXInstPrinter::printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O, argument 147 const MCOperand &MO = MI->getOperand(OpNum); 218 void NVPTXInstPrinter::printLdStCode(const MCInst *MI, int OpNum, argument 221 const MCOperand &MO = MI->getOperand(OpNum); 266 void NVPTXInstPrinter::printMemOperand(const MCInst *MI, int OpNum, argument 268 printOperand(MI, OpNum, O); 272 printOperand(MI, OpNum + 1, O); 274 if (MI->getOperand(OpNum 282 printProtoIdent(const MCInst *MI, int OpNum, raw_ostream &O, const char *Modifier) argument [all...] |
/freebsd-10.1-release/contrib/llvm/include/llvm/MC/MCParser/ |
H A D | MCParsedAsmOperand.h | 37 void setMCOperandNum (unsigned OpNum) { MCOperandNum = OpNum; } argument
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/freebsd-10.1-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64AsmPrinter.h | 51 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 54 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
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H A D | AArch64AsmPrinter.cpp | 145 bool AArch64AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, argument 155 if (!AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O)) 161 if (!printModifiedGPRAsmOperand(MI->getOperand(OpNum), TRI, 168 if (!printModifiedGPRAsmOperand(MI->getOperand(OpNum), TRI, 191 if (!printModifiedFPRAsmOperand(MI->getOperand(OpNum), TRI, 198 if (!printSymbolicAddress(MI->getOperand(OpNum), false, "", O)) 204 if (!printSymbolicAddress(MI->getOperand(OpNum), true, "lo12", O)) 210 if (!printSymbolicAddress(MI->getOperand(OpNum), true, "hi12", O)) 214 return PrintAsmMemoryOperand(MI, OpNum, AsmVariant, ExtraCode, O); 219 const MachineOperand &MO = MI->getOperand(OpNum); 248 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument [all...] |
/freebsd-10.1-release/contrib/llvm/lib/Bitcode/Reader/ |
H A D | BitcodeReader.cpp | 2244 unsigned OpNum = 0; local 2246 if (getValueTypePair(Record, OpNum, NextValueNo, LHS) || 2247 popValue(Record, OpNum, NextValueNo, LHS->getType(), RHS) || 2248 OpNum+1 > Record.size()) 2251 int Opc = GetDecodedBinaryOpcode(Record[OpNum++], LHS->getType()); 2256 if (OpNum < Record.size()) { 2261 if (Record[OpNum] & (1 << bitc::OBO_NO_SIGNED_WRAP)) 2263 if (Record[OpNum] & (1 << bitc::OBO_NO_UNSIGNED_WRAP)) 2269 if (Record[OpNum] & (1 << bitc::PEO_EXACT)) 2273 if (0 != (Record[OpNum] 2291 unsigned OpNum = 0; local 2315 unsigned OpNum = 0; local 2337 unsigned OpNum = 0; local 2358 unsigned OpNum = 0; local 2383 unsigned OpNum = 0; local 2398 unsigned OpNum = 0; local 2423 unsigned OpNum = 0; local 2434 unsigned OpNum = 0; local 2447 unsigned OpNum = 0; local 2467 unsigned OpNum = 0; local 2491 unsigned OpNum = 0; local 2643 unsigned OpNum = 4; local 2781 unsigned OpNum = 0; local 2793 unsigned OpNum = 0; local 2814 unsigned OpNum = 0; local 2828 unsigned OpNum = 0; local 2851 unsigned OpNum = 0; local 2871 unsigned OpNum = 0; local 2911 unsigned OpNum = 2; local [all...] |
/freebsd-10.1-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMAsmPrinter.h | 56 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O, 59 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 62 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
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H A D | ARMAsmPrinter.cpp | 167 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, argument 169 const MachineOperand &MO = MI->getOperand(OpNum); 249 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, argument 259 return AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O); 261 if (MI->getOperand(OpNum).isReg()) { 263 << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg()) 269 if (!MI->getOperand(OpNum).isImm()) 271 O << MI->getOperand(OpNum).getImm(); 275 printOperand(MI, OpNum, O); 278 if (MI->getOperand(OpNum) 424 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument 855 int OpNum = 1; local 906 int OpNum = (Opcode == ARM::t2BR_JT) ? 2 : 1; local [all...] |
H A D | Thumb2SizeReduction.cpp | 378 unsigned OpNum = 3; // First 'rest' of operands. local 416 OpNum = 4; 437 OpNum = 0; 446 OpNum = 2; 454 OpNum = 0; 461 OpNum = 2; 511 for (unsigned e = MI->getNumOperands(); OpNum != e; ++OpNum) 512 MIB.addOperand(MI->getOperand(OpNum));
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/freebsd-10.1-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsAsmPrinter.cpp | 375 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, argument 382 const MachineOperand &MO = MI->getOperand(OpNum); 386 return AsmPrinter::PrintAsmOperand(MI,OpNum,AsmVariant,ExtraCode,O); 422 if (OpNum == 0) 424 const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1); 440 unsigned RegOp = OpNum; 446 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum; 449 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum 476 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument [all...] |
H A D | MipsAsmPrinter.h | 94 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
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/freebsd-10.1-release/contrib/llvm/include/llvm/MC/ |
H A D | MCInstrDesc.h | 156 int getOperandConstraint(unsigned OpNum, argument 158 if (OpNum < NumOperands && 159 (OpInfo[OpNum].Constraints & (1 << Constraint))) { 161 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf;
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/freebsd-10.1-release/contrib/llvm/lib/Target/R600/InstPrinter/ |
H A D | AMDGPUInstPrinter.h | 37 void printInterpSlot(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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/freebsd-10.1-release/contrib/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.h | 372 unsigned getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum, 374 unsigned getUndefRegClearance(const MachineInstr *MI, unsigned &OpNum, 376 void breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum, 381 unsigned OpNum,
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/freebsd-10.1-release/contrib/llvm/lib/CodeGen/ |
H A D | RegAllocFast.cpp | 74 unsigned short LastOpNum; // OpNum on LastUse. 189 LiveRegMap::iterator defineVirtReg(MachineInstr *MI, unsigned OpNum, 191 LiveRegMap::iterator reloadVirtReg(MachineInstr *MI, unsigned OpNum, 194 bool setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg); 582 RAFast::defineVirtReg(MachineInstr *MI, unsigned OpNum, argument 607 LRI->LastOpNum = OpNum; 615 RAFast::reloadVirtReg(MachineInstr *MI, unsigned OpNum, argument 622 MachineOperand &MO = MI->getOperand(OpNum); 658 LRI->LastOpNum = OpNum; 663 // setPhysReg - Change operand OpNum i 666 setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg) argument [all...] |
/freebsd-10.1-release/contrib/llvm/include/llvm/Target/ |
H A D | TargetInstrInfo.h | 59 /// class constraint for OpNum, or NULL. 61 unsigned OpNum, 938 /// instructions. Other defs of MI's operand OpNum are avoided in the last N 956 getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum, argument 974 /// does not take an operand index. Instead sets \p OpNum to the index of the 976 virtual unsigned getUndefRegClearance(const MachineInstr *MI, unsigned &OpNum, argument 983 /// before MI to eliminate an unwanted dependency on OpNum. 1000 breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum, argument
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/freebsd-10.1-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCCodeEmitter.cpp | 263 unsigned getT2AddrModeSORegOpValue(const MCInst &MI, unsigned OpNum, 265 unsigned getT2AddrModeImm8OpValue(const MCInst &MI, unsigned OpNum, 267 unsigned getT2AddrModeImm8OffsetOpValue(const MCInst &MI, unsigned OpNum, 269 unsigned getT2AddrModeImm12OffsetOpValue(const MCInst &MI, unsigned OpNum, 1263 getT2AddrModeSORegOpValue(const MCInst &MI, unsigned OpNum, 1265 const MCOperand &MO1 = MI.getOperand(OpNum); 1266 const MCOperand &MO2 = MI.getOperand(OpNum+1); 1267 const MCOperand &MO3 = MI.getOperand(OpNum+2); 1281 getT2AddrModeImm8OpValue(const MCInst &MI, unsigned OpNum, 1283 const MCOperand &MO1 = MI.getOperand(OpNum); [all...] |