/freebsd-10.1-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 1129 setOperationAction(ISD::FADD, MVT::f32, Legal); 1130 setOperationAction(ISD::FADD, MVT::f64, Legal); 1131 setOperationAction(ISD::FP_EXTEND, MVT::f32, Legal); 1132 setCondCodeAction(ISD::SETOEQ, MVT::f32, Legal); 1133 setCondCodeAction(ISD::SETOEQ, MVT::f64, Legal); 1134 setCondCodeAction(ISD::SETUEQ, MVT::f32, Legal); 1135 setCondCodeAction(ISD::SETUEQ, MVT::f64, Legal); 1137 setCondCodeAction(ISD::SETOGE, MVT::f32, Legal); 1138 setCondCodeAction(ISD::SETOGE, MVT::f64, Legal); 1139 setCondCodeAction(ISD::SETUGE, MVT::f32, Legal); [all...] |
/freebsd-10.1-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 70 setOperationAction(ISD::ADD, VecTys[i], Legal); 71 setOperationAction(ISD::SUB, VecTys[i], Legal); 72 setOperationAction(ISD::LOAD, VecTys[i], Legal); 73 setOperationAction(ISD::STORE, VecTys[i], Legal); 74 setOperationAction(ISD::BITCAST, VecTys[i], Legal); 85 setOperationAction(ISD::MUL, MVT::v2i16, Legal); 167 setOperationAction(ISD::BITCAST, Ty, Legal); 168 setOperationAction(ISD::LOAD, Ty, Legal); 169 setOperationAction(ISD::STORE, Ty, Legal); 171 setOperationAction(ISD::INSERT_VECTOR_ELT, Ty, Legal); [all...] |
H A D | MipsISelLowering.cpp | 378 setOperationAction(ISD::TRAP, MVT::Other, Legal);
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/freebsd-10.1-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 157 // Legal floating-point operations. 158 setOperationAction(ISD::FABS, MVT::f32, Legal); 159 setOperationAction(ISD::FABS, MVT::f64, Legal); 161 setOperationAction(ISD::FCEIL, MVT::f32, Legal); 162 setOperationAction(ISD::FCEIL, MVT::f64, Legal); 164 setOperationAction(ISD::FFLOOR, MVT::f32, Legal); 165 setOperationAction(ISD::FFLOOR, MVT::f64, Legal); 167 setOperationAction(ISD::FNEARBYINT, MVT::f32, Legal); 168 setOperationAction(ISD::FNEARBYINT, MVT::f64, Legal); 170 setOperationAction(ISD::FNEG, MVT::f32, Legal); [all...] |
/freebsd-10.1-release/contrib/llvm/lib/Transforms/Vectorize/ |
H A D | LoopVectorize.cpp | 164 void vectorize(LoopVectorizationLegality *Legal) { argument 166 createEmptyLoop(Legal); 169 vectorizeLoop(Legal); 191 Instruction *addRuntimeCheck(LoopVectorizationLegality *Legal, 194 void createEmptyLoop(LoopVectorizationLegality *Legal); 196 virtual void vectorizeLoop(LoopVectorizationLegality *Legal); 213 void vectorizeBlockInLoop(LoopVectorizationLegality *Legal, BasicBlock *BB, 220 LoopVectorizationLegality *Legal, 233 LoopVectorizationLegality *Legal); 360 LoopVectorizationLegality *Legal); 678 LoopVectorizationCostModel(Loop *L, ScalarEvolution *SE, LoopInfo *LI, LoopVectorizationLegality *Legal, const TargetTransformInfo &TTI, DataLayout *DL, const TargetLibraryInfo *TLI) argument 750 LoopVectorizationLegality *Legal; member in class:__anon2839::LoopVectorizationCostModel 1196 vectorizeMemoryInstruction(Instruction *Instr, LoopVectorizationLegality *Legal) argument 1408 addRuntimeCheck(LoopVectorizationLegality *Legal, Instruction *Loc) argument 1494 createEmptyLoop(LoopVectorizationLegality *Legal) argument 2119 vectorizeLoop(LoopVectorizationLegality *Legal) argument 2412 widenPHIInstruction(Instruction *PN, InnerLoopVectorizer::VectorParts &Entry, LoopVectorizationLegality *Legal, unsigned UF, unsigned VF, PhiVector *PV) argument 2577 vectorizeBlockInLoop(LoopVectorizationLegality *Legal, BasicBlock *BB, PhiVector *PV) argument [all...] |
/freebsd-10.1-release/contrib/llvm/include/llvm/Target/ |
H A D | TargetLowering.h | 81 Legal, // The target natively supports this operation. enumerator in enum:llvm::TargetLoweringBase::LegalizeAction 316 /// legal (return 'Legal') or we need to promote it to a larger type (return 435 (getOperationAction(Op, VT) == Legal || 444 (getOperationAction(Op, VT) == Legal || 458 getOperationAction(Op, VT) == Legal; 473 getLoadExtAction(ExtType, VT.getSimpleVT()) == Legal; 490 getTruncStoreAction(ValVT.getSimpleVT(), MemVT.getSimpleVT()) == Legal; 507 (getIndexedLoadAction(IdxMode, VT.getSimpleVT()) == Legal || 525 (getIndexedStoreAction(IdxMode, VT.getSimpleVT()) == Legal || 548 getCondCodeAction(CC, VT) == Legal || [all...] |
/freebsd-10.1-release/contrib/llvm/lib/Target/R600/ |
H A D | AMDGPUISelLowering.cpp | 54 setOperationAction(ISD::FCEIL, MVT::f32, Legal); 55 setOperationAction(ISD::FEXP2, MVT::f32, Legal); 56 setOperationAction(ISD::FPOW, MVT::f32, Legal); 57 setOperationAction(ISD::FLOG2, MVT::f32, Legal); 58 setOperationAction(ISD::FABS, MVT::f32, Legal); 59 setOperationAction(ISD::FFLOOR, MVT::f32, Legal); 60 setOperationAction(ISD::FRINT, MVT::f32, Legal); 61 setOperationAction(ISD::FROUND, MVT::f32, Legal);
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H A D | AMDILISelLowering.cpp | 164 setOperationAction(ISD::Constant , MVT::i64 , Legal); 177 setOperationAction(ISD::ConstantFP , MVT::f64 , Legal); 205 setOperationAction(ISD::ConstantFP , MVT::f32 , Legal); 206 setOperationAction(ISD::Constant , MVT::i32 , Legal);
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H A D | SIISelLowering.cpp | 79 setOperationAction(ISD::ADD, MVT::i64, Legal); 80 setOperationAction(ISD::ADD, MVT::i32, Legal); 81 setOperationAction(ISD::ADDC, MVT::i32, Legal); 82 setOperationAction(ISD::ADDE, MVT::i32, Legal); 84 setOperationAction(ISD::BITCAST, MVT::i128, Legal);
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/freebsd-10.1-release/contrib/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 340 // f32 and f64 cases are Legal, f80 case is not 352 // are Legal, f80 is custom lowered. 363 // f32 and f64 cases are Legal, f80 case is not 416 // (low) operations are left as Legal, as there are single-result 446 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i32, Legal); 447 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16 , Legal); 448 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Legal); 567 setOperationAction(ISD::PREFETCH , MVT::Other, Legal); 618 setOperationAction(ISD::TRAP, MVT::Other, Legal); 619 setOperationAction(ISD::DEBUGTRAP, MVT::Other, Legal); [all...] |
/freebsd-10.1-release/contrib/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 143 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i64, Legal); 144 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i32, Legal); 145 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Legal); 146 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Legal); 150 setOperationAction(ISD::ROTL, MVT::i64, Legal); 151 setOperationAction(ISD::ROTR, MVT::i64, Legal); 157 setOperationAction(ISD::ROTL, MVT::i32, Legal); 158 setOperationAction(ISD::ROTR, MVT::i32, Legal); 201 setOperationAction(ISD::ConstantFP, MVT::f64, Legal); 202 setOperationAction(ISD::ConstantFP, MVT::f32, Legal); [all...] |
/freebsd-10.1-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 86 setIndexedLoadAction(ISD::PRE_INC, MVT::i1, Legal); 87 setIndexedLoadAction(ISD::PRE_INC, MVT::i8, Legal); 88 setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal); 89 setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal); 90 setIndexedLoadAction(ISD::PRE_INC, MVT::i64, Legal); 91 setIndexedStoreAction(ISD::PRE_INC, MVT::i1, Legal); 92 setIndexedStoreAction(ISD::PRE_INC, MVT::i8, Legal); 93 setIndexedStoreAction(ISD::PRE_INC, MVT::i16, Legal); 94 setIndexedStoreAction(ISD::PRE_INC, MVT::i32, Legal); 95 setIndexedStoreAction(ISD::PRE_INC, MVT::i64, Legal); [all...] |
/freebsd-10.1-release/contrib/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1471 Subtarget->usePopc() ? Legal : Expand); 1488 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Legal); 1490 (Subtarget->isV9() ? Legal: Expand)); 1493 setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Legal); 1500 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i64, Legal); 1501 setOperationAction(ISD::ATOMIC_SWAP, MVT::i64, Legal); 1568 setOperationAction(ISD::TRAP , MVT::Other, Legal); 1583 Subtarget->usePopc() ? Legal : Expand); 1586 setOperationAction(ISD::LOAD, MVT::f128, Legal); 1587 setOperationAction(ISD::STORE, MVT::f128, Legal); [all...] |
/freebsd-10.1-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 183 setOperationAction(ISD::CTLZ, MVT::i64, Legal); 225 setOperationAction(ISD::FRINT, VT, Legal); 229 setOperationAction(ISD::FNEARBYINT, VT, Legal); 230 setOperationAction(ISD::FFLOOR, VT, Legal); 231 setOperationAction(ISD::FCEIL, VT, Legal); 232 setOperationAction(ISD::FTRUNC, VT, Legal); 233 setOperationAction(ISD::FROUND, VT, Legal); 244 setOperationAction(ISD::FMA, MVT::f32, Legal); 245 setOperationAction(ISD::FMA, MVT::f64, Legal);
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/freebsd-10.1-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorOps.cpp | 170 case TargetLowering::Legal: 279 case TargetLowering::Legal: break;
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H A D | LegalizeDAG.cpp | 732 case TargetLowering::Legal: 843 case TargetLowering::Legal: 892 case TargetLowering::Legal: 1064 case TargetLowering::Legal: { 1165 TargetLowering::LegalizeAction Action = TargetLowering::Legal; 1207 if (Action == TargetLowering::Legal) { 1246 if (Action == TargetLowering::Legal) 1256 if (Action == TargetLowering::Legal) 1274 Action = TargetLowering::Legal; 1328 case TargetLowering::Legal [all...] |
H A D | TargetLowering.cpp | 1334 getCondCodeAction(Cond, newVT.getSimpleVT())==Legal)) 1700 getCondCodeAction(NewCond, N0.getSimpleValueType()) == Legal))
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H A D | LegalizeIntegerTypes.cpp | 357 // not Legal, check to see if we can use FP_TO_SINT instead. (If both UINT 921 "Legal vector of one illegal element?"); 2104 if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) ||
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/freebsd-10.1-release/contrib/llvm/lib/CodeGen/ |
H A D | RegAllocGreedy.cpp | 1619 bool Legal = !ProgressRequired || NewGaps < NumGaps; 1621 if (Legal && MaxGap < llvm::huge_valf) {
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/freebsd-10.1-release/contrib/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 83 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); 84 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal);
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/freebsd-10.1-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 122 setOperationAction(ISD::CONCAT_VECTORS, VT, Legal); 123 setOperationAction(ISD::EXTRACT_SUBVECTOR, VT, Legal); 607 setLoadExtAction(ISD::EXTLOAD, Tys[i], Legal); 608 setLoadExtAction(ISD::ZEXTLOAD, Tys[i], Legal); 609 setLoadExtAction(ISD::SEXTLOAD, Tys[i], Legal); 630 setIndexedLoadAction(im, MVT::i1, Legal); 631 setIndexedLoadAction(im, MVT::i8, Legal); 632 setIndexedLoadAction(im, MVT::i16, Legal); 633 setIndexedLoadAction(im, MVT::i32, Legal); 634 setIndexedStoreAction(im, MVT::i1, Legal); [all...] |
/freebsd-10.1-release/contrib/dtc/Documentation/ |
H A D | dtc-paper.tex | 580 \section*{Legal Statement}
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/freebsd-10.1-release/contrib/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 118 setOperationAction(ISD::TRAP, MVT::Other, Legal);
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/freebsd-10.1-release/contrib/amd/doc/ |
H A D | texinfo.tex | 2712 % @tab Legal holiday which is valid in major parts of the whole country.
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/freebsd-10.1-release/contrib/gcc/doc/include/ |
H A D | texinfo.tex | 2886 % @tab Legal holiday which is valid in major parts of the whole country.
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