Searched refs:FSIN (Results 1 - 21 of 21) sorted by relevance

/freebsd-10.1-release/contrib/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h445 /// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
449 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, enumerator in enum:llvm::ISD::NodeType
/freebsd-10.1-release/contrib/one-true-awk/
H A Dawk.h123 #define FSIN 9 macro
H A Dlex.c79 { "sin", FSIN, BLTIN },
H A Drun.c1504 case FSIN:
/freebsd-10.1-release/contrib/llvm/lib/CodeGen/
H A DBasicTargetTransformInfo.cpp449 case Intrinsic::sin: ISD = ISD::FSIN; break;
/freebsd-10.1-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp137 case ISD::FSIN: return "fsin";
H A DLegalizeVectorOps.cpp233 case ISD::FSIN:
H A DLegalizeFloatTypes.cpp92 case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break;
834 case ISD::FSIN: ExpandFloatRes_FSIN(N, Lo, Hi); break;
H A DLegalizeVectorTypes.cpp87 case ISD::FSIN:
548 case ISD::FSIN:
1576 case ISD::FSIN:
H A DLegalizeDAG.cpp2164 unsigned OtherOpcode = Node->getOpcode() == ISD::FSIN
2165 ? ISD::FCOS : ISD::FSIN;
3229 case ISD::FSIN:
3232 bool isSIN = Node->getOpcode() == ISD::FSIN;
H A DSelectionDAGBuilder.cpp5015 case Intrinsic::sin: Opcode = ISD::FSIN; break;
5901 if (visitUnaryFloatCall(I, ISD::FSIN))
H A DDAGCombiner.cpp483 case ISD::FSIN:
557 case ISD::FSIN:
/freebsd-10.1-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1124 setOperationAction(ISD::FSIN, MVT::f32, Expand);
1125 setOperationAction(ISD::FSIN, MVT::f64, Expand);
1385 setOperationAction(ISD::FSIN , MVT::f64, Expand);
1388 setOperationAction(ISD::FSIN , MVT::f32, Expand);
/freebsd-10.1-release/contrib/llvm/lib/Target/R600/
H A DR600ISelLowering.cpp61 setOperationAction(ISD::FSIN, MVT::f32, Custom);
514 case ISD::FSIN: return LowerTrig(Op, DAG);
799 case ISD::FSIN:
/freebsd-10.1-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp217 setOperationAction(ISD::FSIN, MVT::f32, Expand);
218 setOperationAction(ISD::FSIN, MVT::f64, Expand);
238 setOperationAction(ISD::FSIN, MVT::f128, Expand);
/freebsd-10.1-release/contrib/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1512 setOperationAction(ISD::FSIN , MVT::f128, Expand);
1517 setOperationAction(ISD::FSIN , MVT::f64, Expand);
1522 setOperationAction(ISD::FSIN , MVT::f32, Expand);
/freebsd-10.1-release/contrib/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp316 setOperationAction(ISD::FSIN, MVT::f32, Expand);
317 setOperationAction(ISD::FSIN, MVT::f64, Expand);
/freebsd-10.1-release/contrib/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp495 setOperationAction(ISD::FSIN, MVT::v2f64, Expand);
513 setOperationAction(ISD::FSIN, MVT::v4f32, Expand);
530 setOperationAction(ISD::FSIN, MVT::v2f32, Expand);
836 setOperationAction(ISD::FSIN, MVT::f64, Expand);
837 setOperationAction(ISD::FSIN, MVT::f32, Expand);
/freebsd-10.1-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp126 setOperationAction(ISD::FSIN , MVT::f64, Expand);
132 setOperationAction(ISD::FSIN , MVT::f32, Expand);
404 setOperationAction(ISD::FSIN, VT, Expand);
/freebsd-10.1-release/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp670 setOperationAction(ISD::FSIN , MVT::f64, Expand);
673 setOperationAction(ISD::FSIN , MVT::f32, Expand);
700 setOperationAction(ISD::FSIN , MVT::f32, Expand);
712 setOperationAction(ISD::FSIN , MVT::f64, Expand);
728 setOperationAction(ISD::FSIN , MVT::f64, Expand);
729 setOperationAction(ISD::FSIN , MVT::f32, Expand);
770 setOperationAction(ISD::FSIN , MVT::f80, Expand);
819 setOperationAction(ISD::FSIN, VT, Expand);
/freebsd-10.1-release/contrib/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp237 setOperationAction(ISD::FSIN, VT, Expand);

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