1249259Sdim//===-- llvm/CodeGen/ISDOpcodes.h - CodeGen opcodes -------------*- C++ -*-===//
2249259Sdim//
3249259Sdim//                     The LLVM Compiler Infrastructure
4249259Sdim//
5249259Sdim// This file is distributed under the University of Illinois Open Source
6249259Sdim// License. See LICENSE.TXT for details.
7249259Sdim//
8249259Sdim//===----------------------------------------------------------------------===//
9249259Sdim//
10249259Sdim// This file declares codegen opcodes and related utilities.
11249259Sdim//
12249259Sdim//===----------------------------------------------------------------------===//
13249259Sdim
14249259Sdim#ifndef LLVM_CODEGEN_ISDOPCODES_H
15249259Sdim#define LLVM_CODEGEN_ISDOPCODES_H
16249259Sdim
17249259Sdimnamespace llvm {
18249259Sdim
19249259Sdim/// ISD namespace - This namespace contains an enum which represents all of the
20249259Sdim/// SelectionDAG node types and value types.
21249259Sdim///
22249259Sdimnamespace ISD {
23249259Sdim
24249259Sdim  //===--------------------------------------------------------------------===//
25249259Sdim  /// ISD::NodeType enum - This enum defines the target-independent operators
26249259Sdim  /// for a SelectionDAG.
27249259Sdim  ///
28249259Sdim  /// Targets may also define target-dependent operator codes for SDNodes. For
29249259Sdim  /// example, on x86, these are the enum values in the X86ISD namespace.
30249259Sdim  /// Targets should aim to use target-independent operators to model their
31249259Sdim  /// instruction sets as much as possible, and only use target-dependent
32249259Sdim  /// operators when they have special requirements.
33249259Sdim  ///
34249259Sdim  /// Finally, during and after selection proper, SNodes may use special
35249259Sdim  /// operator codes that correspond directly with MachineInstr opcodes. These
36249259Sdim  /// are used to represent selected instructions. See the isMachineOpcode()
37249259Sdim  /// and getMachineOpcode() member functions of SDNode.
38249259Sdim  ///
39249259Sdim  enum NodeType {
40249259Sdim    /// DELETED_NODE - This is an illegal value that is used to catch
41249259Sdim    /// errors.  This opcode is not a legal opcode for any node.
42249259Sdim    DELETED_NODE,
43249259Sdim
44249259Sdim    /// EntryToken - This is the marker used to indicate the start of a region.
45249259Sdim    EntryToken,
46249259Sdim
47249259Sdim    /// TokenFactor - This node takes multiple tokens as input and produces a
48249259Sdim    /// single token result. This is used to represent the fact that the operand
49249259Sdim    /// operators are independent of each other.
50249259Sdim    TokenFactor,
51249259Sdim
52249259Sdim    /// AssertSext, AssertZext - These nodes record if a register contains a
53249259Sdim    /// value that has already been zero or sign extended from a narrower type.
54    /// These nodes take two operands.  The first is the node that has already
55    /// been extended, and the second is a value type node indicating the width
56    /// of the extension
57    AssertSext, AssertZext,
58
59    /// Various leaf nodes.
60    BasicBlock, VALUETYPE, CONDCODE, Register, RegisterMask,
61    Constant, ConstantFP,
62    GlobalAddress, GlobalTLSAddress, FrameIndex,
63    JumpTable, ConstantPool, ExternalSymbol, BlockAddress,
64
65    /// The address of the GOT
66    GLOBAL_OFFSET_TABLE,
67
68    /// FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and
69    /// llvm.returnaddress on the DAG.  These nodes take one operand, the index
70    /// of the frame or return address to return.  An index of zero corresponds
71    /// to the current function's frame or return address, an index of one to
72    /// the parent's frame or return address, and so on.
73    FRAMEADDR, RETURNADDR,
74
75    /// FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to
76    /// first (possible) on-stack argument. This is needed for correct stack
77    /// adjustment during unwind.
78    FRAME_TO_ARGS_OFFSET,
79
80    /// OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents
81    /// 'eh_return' gcc dwarf builtin, which is used to return from
82    /// exception. The general meaning is: adjust stack by OFFSET and pass
83    /// execution to HANDLER. Many platform-related details also :)
84    EH_RETURN,
85
86    /// RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer)
87    /// This corresponds to the eh.sjlj.setjmp intrinsic.
88    /// It takes an input chain and a pointer to the jump buffer as inputs
89    /// and returns an outchain.
90    EH_SJLJ_SETJMP,
91
92    /// OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer)
93    /// This corresponds to the eh.sjlj.longjmp intrinsic.
94    /// It takes an input chain and a pointer to the jump buffer as inputs
95    /// and returns an outchain.
96    EH_SJLJ_LONGJMP,
97
98    /// TargetConstant* - Like Constant*, but the DAG does not do any folding,
99    /// simplification, or lowering of the constant. They are used for constants
100    /// which are known to fit in the immediate fields of their users, or for
101    /// carrying magic numbers which are not values which need to be
102    /// materialized in registers.
103    TargetConstant,
104    TargetConstantFP,
105
106    /// TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or
107    /// anything else with this node, and this is valid in the target-specific
108    /// dag, turning into a GlobalAddress operand.
109    TargetGlobalAddress,
110    TargetGlobalTLSAddress,
111    TargetFrameIndex,
112    TargetJumpTable,
113    TargetConstantPool,
114    TargetExternalSymbol,
115    TargetBlockAddress,
116
117    /// TargetIndex - Like a constant pool entry, but with completely
118    /// target-dependent semantics. Holds target flags, a 32-bit index, and a
119    /// 64-bit index. Targets can use this however they like.
120    TargetIndex,
121
122    /// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...)
123    /// This node represents a target intrinsic function with no side effects.
124    /// The first operand is the ID number of the intrinsic from the
125    /// llvm::Intrinsic namespace.  The operands to the intrinsic follow.  The
126    /// node returns the result of the intrinsic.
127    INTRINSIC_WO_CHAIN,
128
129    /// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...)
130    /// This node represents a target intrinsic function with side effects that
131    /// returns a result.  The first operand is a chain pointer.  The second is
132    /// the ID number of the intrinsic from the llvm::Intrinsic namespace.  The
133    /// operands to the intrinsic follow.  The node has two results, the result
134    /// of the intrinsic and an output chain.
135    INTRINSIC_W_CHAIN,
136
137    /// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...)
138    /// This node represents a target intrinsic function with side effects that
139    /// does not return a result.  The first operand is a chain pointer.  The
140    /// second is the ID number of the intrinsic from the llvm::Intrinsic
141    /// namespace.  The operands to the intrinsic follow.
142    INTRINSIC_VOID,
143
144    /// CopyToReg - This node has three operands: a chain, a register number to
145    /// set to this value, and a value.
146    CopyToReg,
147
148    /// CopyFromReg - This node indicates that the input value is a virtual or
149    /// physical register that is defined outside of the scope of this
150    /// SelectionDAG.  The register is available from the RegisterSDNode object.
151    CopyFromReg,
152
153    /// UNDEF - An undefined node.
154    UNDEF,
155
156    /// EXTRACT_ELEMENT - This is used to get the lower or upper (determined by
157    /// a Constant, which is required to be operand #1) half of the integer or
158    /// float value specified as operand #0.  This is only for use before
159    /// legalization, for values that will be broken into multiple registers.
160    EXTRACT_ELEMENT,
161
162    /// BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
163    /// Given two values of the same integer value type, this produces a value
164    /// twice as big.  Like EXTRACT_ELEMENT, this can only be used before
165    /// legalization.
166    BUILD_PAIR,
167
168    /// MERGE_VALUES - This node takes multiple discrete operands and returns
169    /// them all as its individual results.  This nodes has exactly the same
170    /// number of inputs and outputs. This node is useful for some pieces of the
171    /// code generator that want to think about a single node with multiple
172    /// results, not multiple nodes.
173    MERGE_VALUES,
174
175    /// Simple integer binary arithmetic operators.
176    ADD, SUB, MUL, SDIV, UDIV, SREM, UREM,
177
178    /// SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing
179    /// a signed/unsigned value of type i[2*N], and return the full value as
180    /// two results, each of type iN.
181    SMUL_LOHI, UMUL_LOHI,
182
183    /// SDIVREM/UDIVREM - Divide two integers and produce both a quotient and
184    /// remainder result.
185    SDIVREM, UDIVREM,
186
187    /// CARRY_FALSE - This node is used when folding other nodes,
188    /// like ADDC/SUBC, which indicate the carry result is always false.
189    CARRY_FALSE,
190
191    /// Carry-setting nodes for multiple precision addition and subtraction.
192    /// These nodes take two operands of the same value type, and produce two
193    /// results.  The first result is the normal add or sub result, the second
194    /// result is the carry flag result.
195    ADDC, SUBC,
196
197    /// Carry-using nodes for multiple precision addition and subtraction. These
198    /// nodes take three operands: The first two are the normal lhs and rhs to
199    /// the add or sub, and the third is the input carry flag.  These nodes
200    /// produce two results; the normal result of the add or sub, and the output
201    /// carry flag.  These nodes both read and write a carry flag to allow them
202    /// to them to be chained together for add and sub of arbitrarily large
203    /// values.
204    ADDE, SUBE,
205
206    /// RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
207    /// These nodes take two operands: the normal LHS and RHS to the add. They
208    /// produce two results: the normal result of the add, and a boolean that
209    /// indicates if an overflow occurred (*not* a flag, because it may be store
210    /// to memory, etc.).  If the type of the boolean is not i1 then the high
211    /// bits conform to getBooleanContents.
212    /// These nodes are generated from llvm.[su]add.with.overflow intrinsics.
213    SADDO, UADDO,
214
215    /// Same for subtraction.
216    SSUBO, USUBO,
217
218    /// Same for multiplication.
219    SMULO, UMULO,
220
221    /// Simple binary floating point operators.
222    FADD, FSUB, FMUL, FMA, FDIV, FREM,
223
224    /// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.  NOTE: This
225    /// DAG node does not require that X and Y have the same type, just that the
226    /// are both floating point.  X and the result must have the same type.
227    /// FCOPYSIGN(f32, f64) is allowed.
228    FCOPYSIGN,
229
230    /// INT = FGETSIGN(FP) - Return the sign bit of the specified floating point
231    /// value as an integer 0/1 value.
232    FGETSIGN,
233
234    /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the
235    /// specified, possibly variable, elements.  The number of elements is
236    /// required to be a power of two.  The types of the operands must all be
237    /// the same and must match the vector element type, except that integer
238    /// types are allowed to be larger than the element type, in which case
239    /// the operands are implicitly truncated.
240    BUILD_VECTOR,
241
242    /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element
243    /// at IDX replaced with VAL.  If the type of VAL is larger than the vector
244    /// element type then VAL is truncated before replacement.
245    INSERT_VECTOR_ELT,
246
247    /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR
248    /// identified by the (potentially variable) element number IDX.  If the
249    /// return type is an integer type larger than the element type of the
250    /// vector, the result is extended to the width of the return type.
251    EXTRACT_VECTOR_ELT,
252
253    /// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of
254    /// vector type with the same length and element type, this produces a
255    /// concatenated vector result value, with length equal to the sum of the
256    /// lengths of the input vectors.
257    CONCAT_VECTORS,
258
259    /// INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector
260    /// with VECTOR2 inserted into VECTOR1 at the (potentially
261    /// variable) element number IDX, which must be a multiple of the
262    /// VECTOR2 vector length.  The elements of VECTOR1 starting at
263    /// IDX are overwritten with VECTOR2.  Elements IDX through
264    /// vector_length(VECTOR2) must be valid VECTOR1 indices.
265    INSERT_SUBVECTOR,
266
267    /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an
268    /// vector value) starting with the element number IDX, which must be a
269    /// constant multiple of the result vector length.
270    EXTRACT_SUBVECTOR,
271
272    /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as
273    /// VEC1/VEC2.  A VECTOR_SHUFFLE node also contains an array of constant int
274    /// values that indicate which value (or undef) each result element will
275    /// get.  These constant ints are accessible through the
276    /// ShuffleVectorSDNode class.  This is quite similar to the Altivec
277    /// 'vperm' instruction, except that the indices must be constants and are
278    /// in terms of the element size of VEC1/VEC2, not in terms of bytes.
279    VECTOR_SHUFFLE,
280
281    /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a
282    /// scalar value into element 0 of the resultant vector type.  The top
283    /// elements 1 to N-1 of the N-element vector are undefined.  The type
284    /// of the operand must match the vector element type, except when they
285    /// are integer types.  In this case the operand is allowed to be wider
286    /// than the vector element type, and is implicitly truncated to it.
287    SCALAR_TO_VECTOR,
288
289    /// MULHU/MULHS - Multiply high - Multiply two integers of type iN,
290    /// producing an unsigned/signed value of type i[2*N], then return the top
291    /// part.
292    MULHU, MULHS,
293
294    /// Bitwise operators - logical and, logical or, logical xor.
295    AND, OR, XOR,
296
297    /// Shift and rotation operations.  After legalization, the type of the
298    /// shift amount is known to be TLI.getShiftAmountTy().  Before legalization
299    /// the shift amount can be any type, but care must be taken to ensure it is
300    /// large enough.  TLI.getShiftAmountTy() is i8 on some targets, but before
301    /// legalization, types like i1024 can occur and i8 doesn't have enough bits
302    /// to represent the shift amount.
303    /// When the 1st operand is a vector, the shift amount must be in the same
304    /// type. (TLI.getShiftAmountTy() will return the same type when the input
305    /// type is a vector.)
306    SHL, SRA, SRL, ROTL, ROTR,
307
308    /// Byte Swap and Counting operators.
309    BSWAP, CTTZ, CTLZ, CTPOP,
310
311    /// Bit counting operators with an undefined result for zero inputs.
312    CTTZ_ZERO_UNDEF, CTLZ_ZERO_UNDEF,
313
314    /// Select(COND, TRUEVAL, FALSEVAL).  If the type of the boolean COND is not
315    /// i1 then the high bits must conform to getBooleanContents.
316    SELECT,
317
318    /// Select with a vector condition (op #0) and two vector operands (ops #1
319    /// and #2), returning a vector result.  All vectors have the same length.
320    /// Much like the scalar select and setcc, each bit in the condition selects
321    /// whether the corresponding result element is taken from op #1 or op #2.
322    /// At first, the VSELECT condition is of vXi1 type. Later, targets may
323    /// change the condition type in order to match the VSELECT node using a
324    /// pattern. The condition follows the BooleanContent format of the target.
325    VSELECT,
326
327    /// Select with condition operator - This selects between a true value and
328    /// a false value (ops #2 and #3) based on the boolean result of comparing
329    /// the lhs and rhs (ops #0 and #1) of a conditional expression with the
330    /// condition code in op #4, a CondCodeSDNode.
331    SELECT_CC,
332
333    /// SetCC operator - This evaluates to a true value iff the condition is
334    /// true.  If the result value type is not i1 then the high bits conform
335    /// to getBooleanContents.  The operands to this are the left and right
336    /// operands to compare (ops #0, and #1) and the condition code to compare
337    /// them with (op #2) as a CondCodeSDNode. If the operands are vector types
338    /// then the result type must also be a vector type.
339    SETCC,
340
341    /// SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded
342    /// integer shift operations, just like ADD/SUB_PARTS.  The operation
343    /// ordering is:
344    ///       [Lo,Hi] = op [LoLHS,HiLHS], Amt
345    SHL_PARTS, SRA_PARTS, SRL_PARTS,
346
347    /// Conversion operators.  These are all single input single output
348    /// operations.  For all of these, the result type must be strictly
349    /// wider or narrower (depending on the operation) than the source
350    /// type.
351
352    /// SIGN_EXTEND - Used for integer types, replicating the sign bit
353    /// into new bits.
354    SIGN_EXTEND,
355
356    /// ZERO_EXTEND - Used for integer types, zeroing the new bits.
357    ZERO_EXTEND,
358
359    /// ANY_EXTEND - Used for integer types.  The high bits are undefined.
360    ANY_EXTEND,
361
362    /// TRUNCATE - Completely drop the high bits.
363    TRUNCATE,
364
365    /// [SU]INT_TO_FP - These operators convert integers (whose interpreted sign
366    /// depends on the first letter) to floating point.
367    SINT_TO_FP,
368    UINT_TO_FP,
369
370    /// SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to
371    /// sign extend a small value in a large integer register (e.g. sign
372    /// extending the low 8 bits of a 32-bit register to fill the top 24 bits
373    /// with the 7th bit).  The size of the smaller type is indicated by the 1th
374    /// operand, a ValueType node.
375    SIGN_EXTEND_INREG,
376
377    /// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned
378    /// integer.
379    FP_TO_SINT,
380    FP_TO_UINT,
381
382    /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type
383    /// down to the precision of the destination VT.  TRUNC is a flag, which is
384    /// always an integer that is zero or one.  If TRUNC is 0, this is a
385    /// normal rounding, if it is 1, this FP_ROUND is known to not change the
386    /// value of Y.
387    ///
388    /// The TRUNC = 1 case is used in cases where we know that the value will
389    /// not be modified by the node, because Y is not using any of the extra
390    /// precision of source type.  This allows certain transformations like
391    /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for
392    /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed.
393    FP_ROUND,
394
395    /// FLT_ROUNDS_ - Returns current rounding mode:
396    /// -1 Undefined
397    ///  0 Round to 0
398    ///  1 Round to nearest
399    ///  2 Round to +inf
400    ///  3 Round to -inf
401    FLT_ROUNDS_,
402
403    /// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and
404    /// rounds it to a floating point value.  It then promotes it and returns it
405    /// in a register of the same size.  This operation effectively just
406    /// discards excess precision.  The type to round down to is specified by
407    /// the VT operand, a VTSDNode.
408    FP_ROUND_INREG,
409
410    /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
411    FP_EXTEND,
412
413    /// BITCAST - This operator converts between integer, vector and FP
414    /// values, as if the value was stored to memory with one type and loaded
415    /// from the same address with the other type (or equivalently for vector
416    /// format conversions, etc).  The source and result are required to have
417    /// the same bit size (e.g.  f32 <-> i32).  This can also be used for
418    /// int-to-int or fp-to-fp conversions, but that is a noop, deleted by
419    /// getNode().
420    BITCAST,
421
422    /// ADDRSPACECAST - This operator converts between pointers of different
423    /// address spaces.
424    ADDRSPACECAST,
425
426    /// CONVERT_RNDSAT - This operator is used to support various conversions
427    /// between various types (float, signed, unsigned and vectors of those
428    /// types) with rounding and saturation. NOTE: Avoid using this operator as
429    /// most target don't support it and the operator might be removed in the
430    /// future. It takes the following arguments:
431    ///   0) value
432    ///   1) dest type (type to convert to)
433    ///   2) src type (type to convert from)
434    ///   3) rounding imm
435    ///   4) saturation imm
436    ///   5) ISD::CvtCode indicating the type of conversion to do
437    CONVERT_RNDSAT,
438
439    /// FP16_TO_FP32, FP32_TO_FP16 - These operators are used to perform
440    /// promotions and truncation for half-precision (16 bit) floating
441    /// numbers. We need special nodes since FP16 is a storage-only type with
442    /// special semantics of operations.
443    FP16_TO_FP32, FP32_TO_FP16,
444
445    /// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
446    /// FLOG, FLOG2, FLOG10, FEXP, FEXP2,
447    /// FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR - Perform various unary
448    /// floating point operations. These are inspired by libm.
449    FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
450    FLOG, FLOG2, FLOG10, FEXP, FEXP2,
451    FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR,
452
453    /// FSINCOS - Compute both fsin and fcos as a single operation.
454    FSINCOS,
455
456    /// LOAD and STORE have token chains as their first operand, then the same
457    /// operands as an LLVM load/store instruction, then an offset node that
458    /// is added / subtracted from the base pointer to form the address (for
459    /// indexed memory ops).
460    LOAD, STORE,
461
462    /// DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned
463    /// to a specified boundary.  This node always has two return values: a new
464    /// stack pointer value and a chain. The first operand is the token chain,
465    /// the second is the number of bytes to allocate, and the third is the
466    /// alignment boundary.  The size is guaranteed to be a multiple of the
467    /// stack alignment, and the alignment is guaranteed to be bigger than the
468    /// stack alignment (if required) or 0 to get standard stack alignment.
469    DYNAMIC_STACKALLOC,
470
471    /// Control flow instructions.  These all have token chains.
472
473    /// BR - Unconditional branch.  The first operand is the chain
474    /// operand, the second is the MBB to branch to.
475    BR,
476
477    /// BRIND - Indirect branch.  The first operand is the chain, the second
478    /// is the value to branch to, which must be of the same type as the
479    /// target's pointer type.
480    BRIND,
481
482    /// BR_JT - Jumptable branch. The first operand is the chain, the second
483    /// is the jumptable index, the last one is the jumptable entry index.
484    BR_JT,
485
486    /// BRCOND - Conditional branch.  The first operand is the chain, the
487    /// second is the condition, the third is the block to branch to if the
488    /// condition is true.  If the type of the condition is not i1, then the
489    /// high bits must conform to getBooleanContents.
490    BRCOND,
491
492    /// BR_CC - Conditional branch.  The behavior is like that of SELECT_CC, in
493    /// that the condition is represented as condition code, and two nodes to
494    /// compare, rather than as a combined SetCC node.  The operands in order
495    /// are chain, cc, lhs, rhs, block to branch to if condition is true.
496    BR_CC,
497
498    /// INLINEASM - Represents an inline asm block.  This node always has two
499    /// return values: a chain and a flag result.  The inputs are as follows:
500    ///   Operand #0  : Input chain.
501    ///   Operand #1  : a ExternalSymbolSDNode with a pointer to the asm string.
502    ///   Operand #2  : a MDNodeSDNode with the !srcloc metadata.
503    ///   Operand #3  : HasSideEffect, IsAlignStack bits.
504    ///   After this, it is followed by a list of operands with this format:
505    ///     ConstantSDNode: Flags that encode whether it is a mem or not, the
506    ///                     of operands that follow, etc.  See InlineAsm.h.
507    ///     ... however many operands ...
508    ///   Operand #last: Optional, an incoming flag.
509    ///
510    /// The variable width operands are required to represent target addressing
511    /// modes as a single "operand", even though they may have multiple
512    /// SDOperands.
513    INLINEASM,
514
515    /// EH_LABEL - Represents a label in mid basic block used to track
516    /// locations needed for debug and exception handling tables.  These nodes
517    /// take a chain as input and return a chain.
518    EH_LABEL,
519
520    /// STACKSAVE - STACKSAVE has one operand, an input chain.  It produces a
521    /// value, the same type as the pointer type for the system, and an output
522    /// chain.
523    STACKSAVE,
524
525    /// STACKRESTORE has two operands, an input chain and a pointer to restore
526    /// to it returns an output chain.
527    STACKRESTORE,
528
529    /// CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end
530    /// of a call sequence, and carry arbitrary information that target might
531    /// want to know.  The first operand is a chain, the rest are specified by
532    /// the target and not touched by the DAG optimizers.
533    /// CALLSEQ_START..CALLSEQ_END pairs may not be nested.
534    CALLSEQ_START,  // Beginning of a call sequence
535    CALLSEQ_END,    // End of a call sequence
536
537    /// VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE,
538    /// and the alignment. It returns a pair of values: the vaarg value and a
539    /// new chain.
540    VAARG,
541
542    /// VACOPY - VACOPY has 5 operands: an input chain, a destination pointer,
543    /// a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the
544    /// source.
545    VACOPY,
546
547    /// VAEND, VASTART - VAEND and VASTART have three operands: an input chain,
548    /// pointer, and a SRCVALUE.
549    VAEND, VASTART,
550
551    /// SRCVALUE - This is a node type that holds a Value* that is used to
552    /// make reference to a value in the LLVM IR.
553    SRCVALUE,
554
555    /// MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to
556    /// reference metadata in the IR.
557    MDNODE_SDNODE,
558
559    /// PCMARKER - This corresponds to the pcmarker intrinsic.
560    PCMARKER,
561
562    /// READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
563    /// The only operand is a chain and a value and a chain are produced.  The
564    /// value is the contents of the architecture specific cycle counter like
565    /// register (or other high accuracy low latency clock source)
566    READCYCLECOUNTER,
567
568    /// HANDLENODE node - Used as a handle for various purposes.
569    HANDLENODE,
570
571    /// INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic.  It
572    /// takes as input a token chain, the pointer to the trampoline, the pointer
573    /// to the nested function, the pointer to pass for the 'nest' parameter, a
574    /// SRCVALUE for the trampoline and another for the nested function
575    /// (allowing targets to access the original Function*).
576    /// It produces a token chain as output.
577    INIT_TRAMPOLINE,
578
579    /// ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
580    /// It takes a pointer to the trampoline and produces a (possibly) new
581    /// pointer to the same trampoline with platform-specific adjustments
582    /// applied.  The pointer it returns points to an executable block of code.
583    ADJUST_TRAMPOLINE,
584
585    /// TRAP - Trapping instruction
586    TRAP,
587
588    /// DEBUGTRAP - Trap intended to get the attention of a debugger.
589    DEBUGTRAP,
590
591    /// PREFETCH - This corresponds to a prefetch intrinsic. The first operand
592    /// is the chain.  The other operands are the address to prefetch,
593    /// read / write specifier, locality specifier and instruction / data cache
594    /// specifier.
595    PREFETCH,
596
597    /// OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope)
598    /// This corresponds to the fence instruction. It takes an input chain, and
599    /// two integer constants: an AtomicOrdering and a SynchronizationScope.
600    ATOMIC_FENCE,
601
602    /// Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr)
603    /// This corresponds to "load atomic" instruction.
604    ATOMIC_LOAD,
605
606    /// OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr, val)
607    /// This corresponds to "store atomic" instruction.
608    ATOMIC_STORE,
609
610    /// Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap)
611    /// For double-word atomic operations:
612    /// ValLo, ValHi, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmpLo, cmpHi,
613    ///                                          swapLo, swapHi)
614    /// This corresponds to the cmpxchg instruction.
615    ATOMIC_CMP_SWAP,
616
617    /// Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt)
618    /// Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt)
619    /// For double-word atomic operations:
620    /// ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi)
621    /// ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi)
622    /// These correspond to the atomicrmw instruction.
623    ATOMIC_SWAP,
624    ATOMIC_LOAD_ADD,
625    ATOMIC_LOAD_SUB,
626    ATOMIC_LOAD_AND,
627    ATOMIC_LOAD_OR,
628    ATOMIC_LOAD_XOR,
629    ATOMIC_LOAD_NAND,
630    ATOMIC_LOAD_MIN,
631    ATOMIC_LOAD_MAX,
632    ATOMIC_LOAD_UMIN,
633    ATOMIC_LOAD_UMAX,
634
635    /// This corresponds to the llvm.lifetime.* intrinsics. The first operand
636    /// is the chain and the second operand is the alloca pointer.
637    LIFETIME_START, LIFETIME_END,
638
639    /// BUILTIN_OP_END - This must be the last enum value in this list.
640    /// The target-specific pre-isel opcode values start here.
641    BUILTIN_OP_END
642  };
643
644  /// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations
645  /// which do not reference a specific memory location should be less than
646  /// this value. Those that do must not be less than this value, and can
647  /// be used with SelectionDAG::getMemIntrinsicNode.
648  static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+180;
649
650  //===--------------------------------------------------------------------===//
651  /// MemIndexedMode enum - This enum defines the load / store indexed
652  /// addressing modes.
653  ///
654  /// UNINDEXED    "Normal" load / store. The effective address is already
655  ///              computed and is available in the base pointer. The offset
656  ///              operand is always undefined. In addition to producing a
657  ///              chain, an unindexed load produces one value (result of the
658  ///              load); an unindexed store does not produce a value.
659  ///
660  /// PRE_INC      Similar to the unindexed mode where the effective address is
661  /// PRE_DEC      the value of the base pointer add / subtract the offset.
662  ///              It considers the computation as being folded into the load /
663  ///              store operation (i.e. the load / store does the address
664  ///              computation as well as performing the memory transaction).
665  ///              The base operand is always undefined. In addition to
666  ///              producing a chain, pre-indexed load produces two values
667  ///              (result of the load and the result of the address
668  ///              computation); a pre-indexed store produces one value (result
669  ///              of the address computation).
670  ///
671  /// POST_INC     The effective address is the value of the base pointer. The
672  /// POST_DEC     value of the offset operand is then added to / subtracted
673  ///              from the base after memory transaction. In addition to
674  ///              producing a chain, post-indexed load produces two values
675  ///              (the result of the load and the result of the base +/- offset
676  ///              computation); a post-indexed store produces one value (the
677  ///              the result of the base +/- offset computation).
678  enum MemIndexedMode {
679    UNINDEXED = 0,
680    PRE_INC,
681    PRE_DEC,
682    POST_INC,
683    POST_DEC,
684    LAST_INDEXED_MODE
685  };
686
687  //===--------------------------------------------------------------------===//
688  /// LoadExtType enum - This enum defines the three variants of LOADEXT
689  /// (load with extension).
690  ///
691  /// SEXTLOAD loads the integer operand and sign extends it to a larger
692  ///          integer result type.
693  /// ZEXTLOAD loads the integer operand and zero extends it to a larger
694  ///          integer result type.
695  /// EXTLOAD  is used for two things: floating point extending loads and
696  ///          integer extending loads [the top bits are undefined].
697  enum LoadExtType {
698    NON_EXTLOAD = 0,
699    EXTLOAD,
700    SEXTLOAD,
701    ZEXTLOAD,
702    LAST_LOADEXT_TYPE
703  };
704
705  //===--------------------------------------------------------------------===//
706  /// ISD::CondCode enum - These are ordered carefully to make the bitfields
707  /// below work out, when considering SETFALSE (something that never exists
708  /// dynamically) as 0.  "U" -> Unsigned (for integer operands) or Unordered
709  /// (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal
710  /// to.  If the "N" column is 1, the result of the comparison is undefined if
711  /// the input is a NAN.
712  ///
713  /// All of these (except for the 'always folded ops') should be handled for
714  /// floating point.  For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT,
715  /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used.
716  ///
717  /// Note that these are laid out in a specific order to allow bit-twiddling
718  /// to transform conditions.
719  enum CondCode {
720    // Opcode          N U L G E       Intuitive operation
721    SETFALSE,      //    0 0 0 0       Always false (always folded)
722    SETOEQ,        //    0 0 0 1       True if ordered and equal
723    SETOGT,        //    0 0 1 0       True if ordered and greater than
724    SETOGE,        //    0 0 1 1       True if ordered and greater than or equal
725    SETOLT,        //    0 1 0 0       True if ordered and less than
726    SETOLE,        //    0 1 0 1       True if ordered and less than or equal
727    SETONE,        //    0 1 1 0       True if ordered and operands are unequal
728    SETO,          //    0 1 1 1       True if ordered (no nans)
729    SETUO,         //    1 0 0 0       True if unordered: isnan(X) | isnan(Y)
730    SETUEQ,        //    1 0 0 1       True if unordered or equal
731    SETUGT,        //    1 0 1 0       True if unordered or greater than
732    SETUGE,        //    1 0 1 1       True if unordered, greater than, or equal
733    SETULT,        //    1 1 0 0       True if unordered or less than
734    SETULE,        //    1 1 0 1       True if unordered, less than, or equal
735    SETUNE,        //    1 1 1 0       True if unordered or not equal
736    SETTRUE,       //    1 1 1 1       Always true (always folded)
737    // Don't care operations: undefined if the input is a nan.
738    SETFALSE2,     //  1 X 0 0 0       Always false (always folded)
739    SETEQ,         //  1 X 0 0 1       True if equal
740    SETGT,         //  1 X 0 1 0       True if greater than
741    SETGE,         //  1 X 0 1 1       True if greater than or equal
742    SETLT,         //  1 X 1 0 0       True if less than
743    SETLE,         //  1 X 1 0 1       True if less than or equal
744    SETNE,         //  1 X 1 1 0       True if not equal
745    SETTRUE2,      //  1 X 1 1 1       Always true (always folded)
746
747    SETCC_INVALID       // Marker value.
748  };
749
750  /// isSignedIntSetCC - Return true if this is a setcc instruction that
751  /// performs a signed comparison when used with integer operands.
752  inline bool isSignedIntSetCC(CondCode Code) {
753    return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE;
754  }
755
756  /// isUnsignedIntSetCC - Return true if this is a setcc instruction that
757  /// performs an unsigned comparison when used with integer operands.
758  inline bool isUnsignedIntSetCC(CondCode Code) {
759    return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE;
760  }
761
762  /// isTrueWhenEqual - Return true if the specified condition returns true if
763  /// the two operands to the condition are equal.  Note that if one of the two
764  /// operands is a NaN, this value is meaningless.
765  inline bool isTrueWhenEqual(CondCode Cond) {
766    return ((int)Cond & 1) != 0;
767  }
768
769  /// getUnorderedFlavor - This function returns 0 if the condition is always
770  /// false if an operand is a NaN, 1 if the condition is always true if the
771  /// operand is a NaN, and 2 if the condition is undefined if the operand is a
772  /// NaN.
773  inline unsigned getUnorderedFlavor(CondCode Cond) {
774    return ((int)Cond >> 3) & 3;
775  }
776
777  /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
778  /// 'op' is a valid SetCC operation.
779  CondCode getSetCCInverse(CondCode Operation, bool isInteger);
780
781  /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
782  /// when given the operation for (X op Y).
783  CondCode getSetCCSwappedOperands(CondCode Operation);
784
785  /// getSetCCOrOperation - Return the result of a logical OR between different
786  /// comparisons of identical values: ((X op1 Y) | (X op2 Y)).  This
787  /// function returns SETCC_INVALID if it is not possible to represent the
788  /// resultant comparison.
789  CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
790
791  /// getSetCCAndOperation - Return the result of a logical AND between
792  /// different comparisons of identical values: ((X op1 Y) & (X op2 Y)).  This
793  /// function returns SETCC_INVALID if it is not possible to represent the
794  /// resultant comparison.
795  CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
796
797  //===--------------------------------------------------------------------===//
798  /// CvtCode enum - This enum defines the various converts CONVERT_RNDSAT
799  /// supports.
800  enum CvtCode {
801    CVT_FF,     /// Float from Float
802    CVT_FS,     /// Float from Signed
803    CVT_FU,     /// Float from Unsigned
804    CVT_SF,     /// Signed from Float
805    CVT_UF,     /// Unsigned from Float
806    CVT_SS,     /// Signed from Signed
807    CVT_SU,     /// Signed from Unsigned
808    CVT_US,     /// Unsigned from Signed
809    CVT_UU,     /// Unsigned from Unsigned
810    CVT_INVALID /// Marker - Invalid opcode
811  };
812
813} // end llvm::ISD namespace
814
815} // end llvm namespace
816
817#endif
818