/freebsd-10.0-release/contrib/compiler-rt/lib/arm/ |
H A D | bswapsi2.S | 21 eor r1, r0, r0, ror #16 24 eor r0, r1, r0, ror #8
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H A D | bswapdi2.S | 22 eor r2, r0, r0, ror #16 25 eor r2, r2, r0, ror #8 27 eor r0, r1, r1, ror #16 30 eor r0, r0, r1, ror #8
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/freebsd-10.0-release/crypto/openssl/crypto/sha/asm/ |
H A D | sha1-armv4-large.pl | 80 add $e,$K,$e,ror#2 @ E+=K_xx_xx 85 mov $t0,$t0,ror#31 86 add $e,$e,$a,ror#27 @ E+=ROR(A,27) 87 eor $t0,$t0,$t2,ror#31 102 add $e,$K,$e,ror#2 @ E+=K_00_19 107 add $e,$e,$a,ror#27 @ E+=ROR(A,27) 111 add $e,$K,$e,ror#2 @ E+=K_00_19 113 add $e,$e,$a,ror#27 @ E+=ROR(A,27) 118 and $t1,$b,$t1,ror#2 120 eor $t1,$t1,$d,ror# [all...] |
H A D | sha256-586.pl | 52 &ror ("ecx",25-11); 55 &ror ("ecx",11-6); 58 &ror ("ecx",6); # Sigma1(e) 71 &ror ("ecx",22-13); 74 &ror ("ecx",13-2); 77 &ror ("ecx",2); # Sigma0(a) 170 &ror ("esi",18-7); 173 &ror ("esi",7); 176 &ror ("edi",19-17); 179 &ror ("ed [all...] |
H A D | sha256-armv4.pl | 67 mov $t0,$e,ror#$Sigma1[0] 69 eor $t0,$t0,$e,ror#$Sigma1[1] 79 eor $t0,$t0,$e,ror#$Sigma1[2] @ Sigma1(e) 85 mov $h,$a,ror#$Sigma0[0] 87 eor $h,$h,$a,ror#$Sigma0[1] 89 eor $h,$h,$a,ror#$Sigma0[2] @ Sigma0(a) 109 mov $t0,$t3,ror#$sigma0[0] 111 eor $t0,$t0,$t3,ror#$sigma0[1] 114 mov $t3,$t2,ror#$sigma1[0] 116 eor $t3,$t3,$t2,ror# [all...] |
H A D | sha512-x86_64.pl | 99 ror \$`$Sigma1[2]-$Sigma1[1]`,$a0 103 ror \$`$Sigma0[2]-$Sigma0[1]`,$a1 107 ror \$`$Sigma1[1]-$Sigma1[0]`,$a0 115 ror \$`$Sigma0[1]-$Sigma0[0]`,$a1 124 ror \$$Sigma1[0],$a0 # Sigma1(e) 128 ror \$$Sigma0[0],$a1 # Sigma0(a) 149 ror \$`$sigma0[1]-$sigma0[0]`,$T1 153 ror \$$sigma0[0],$T1 157 ror \$`$sigma1[1]-$sigma1[0]`,$a2 161 ror \ [all...] |
H A D | sha1-thumb.pl | 164 ror $a,$e
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/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMSelectionDAGInfo.h | 29 case ISD::ROTR: return ARM_AM::ror;
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H A D | ARMCodeEmitter.cpp | 418 case ARM_AM::ror: 951 case ARM_AM::ror: SBits = 0x7; break; 965 case ARM_AM::ror: SBits = 0x6; break;
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/freebsd-10.0-release/crypto/openssl/crypto/aes/asm/ |
H A D | aes-armv4.pl | 300 eor $s0,$s0,$i1,ror#8 303 eor $t2,$t2,$i2,ror#8 305 eor $t3,$t3,$i3,ror#8 308 eor $s1,$s1,$t1,ror#24 313 eor $s0,$s0,$i1,ror#16 316 eor $s1,$s1,$i2,ror#8 318 eor $t3,$t3,$i3,ror#16 321 eor $s2,$s2,$t2,ror#16 326 eor $s0,$s0,$i1,ror#24 328 eor $s1,$s1,$i2,ror#1 [all...] |
H A D | aes-x86_64.pl | 457 ror \$16,$tmp 459 ror \$8,$tmp 502 ror \$16,$t0 503 ror \$16,$t1 510 ror \$8,$t0 511 ror \$8,$t1 533 ror \$16,$t2 534 ror \$16,$t3 539 ror \$8,$t2 540 ror \ [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMAddressingModes.h | 32 ror, enumerator in enum:llvm::ARM_AM::ShiftOpc 51 case ARM_AM::ror: return "ror"; 62 case ARM_AM::ror: return 3; 105 // reg [asr|lsl|lsr|ror|rrx] reg 106 // reg [asr|lsl|lsr|ror|rrx] imm
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H A D | ARMMCCodeEmitter.cpp | 188 case ARM_AM::ror: 1184 case ARM_AM::ror: SBits = 0x7; break; 1228 case ARM_AM::ror: SBits = 0x6; break; 1344 case ARM_AM::ror: SBits = 0x6; break;
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/freebsd-10.0-release/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ |
H A D | ARMUtils.h | 283 static uint32_t ror(uint32_t val, uint32_t N, uint32_t shift) function in namespace:lldb_private 302 imm32 = ror(imm, 32, amt); 350 imm32 = ror(unrotated_value, 32, bits(imm12, 11, 7));
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/freebsd-10.0-release/crypto/openssl/crypto/perlasm/ |
H A D | x86asm.pl | 54 &ror (@_,16); 65 sub ::rotr { &ror(@_); }
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/freebsd-10.0-release/crypto/openssl/crypto/rc4/asm/ |
H A D | rc4-x86_64.pl | 204 ror \$8,%r8 # ror is redundant when $i=0 213 ror \$8,%r8 355 ror \$8,%r8d 374 ror \$8,%r9d
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H A D | rc4-586.pl | 84 &ror ($out,8) if ($i!=0); 238 &ror ($out,8);
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/freebsd-10.0-release/contrib/gcc/config/arm/ |
H A D | lib1funcs.asm | 593 ror curbit, work 603 ror curbit, work 613 ror curbit, work 679 ror curbit, work 687 ror curbit, work 695 ror curbit, work
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/freebsd-10.0-release/sys/arm/arm/ |
H A D | in_cksum_arm.S | 79 movne r2, r2, ror #8
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/freebsd-10.0-release/sys/contrib/octeon-sdk/ |
H A D | cvmx-npi-defs.h | 1831 uint64_t ror : 1; /**< Enables '1' Relaxed Ordering for reading of member in struct:cvmx_npi_input_control::cvmx_npi_input_control_s 1834 uint64_t ror : 1; 1866 uint64_t ror : 1; /**< Enables '1' Relaxed Ordering for reading of member in struct:cvmx_npi_input_control::cvmx_npi_input_control_cn30xx 1869 uint64_t ror : 1; 3196 uint64_t ror : 1; /**< Relax Read on read. */ member in struct:cvmx_npi_mem_access_subidx::cvmx_npi_mem_access_subidx_s 3202 uint64_t ror : 1; 3220 uint64_t ror : 1; /**< Relax Read on read. */ member in struct:cvmx_npi_mem_access_subidx::cvmx_npi_mem_access_subidx_cn31xx 3226 uint64_t ror : 1;
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H A D | cvmx-sli-defs.h | 4904 uint64_t ror : 32; /**< ADDRTYPE<0> or MACADD<60> for buffer/info writes. member in struct:cvmx_sli_pkt_data_out_ror::cvmx_sli_pkt_data_out_ror_s 4914 uint64_t ror : 32; 5170 uint64_t ror : 1; /**< ADDRTYPE<0> for packet input instruction reads and member in struct:cvmx_sli_pkt_input_control::cvmx_sli_pkt_input_control_s 5176 uint64_t ror : 1; 5254 uint64_t ror : 1; /**< ADDRTYPE<0> for packet input instruction reads and member in struct:cvmx_sli_pkt_input_control::cvmx_sli_pkt_input_control_cn63xx 5260 uint64_t ror : 1; 5702 uint64_t ror : 32; /**< ADDRTYPE<0> for the packet output ring reads that member in struct:cvmx_sli_pkt_slist_ror::cvmx_sli_pkt_slist_ror_s 5711 uint64_t ror : 32;
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H A D | cvmx-npei-defs.h | 5438 uint64_t ror : 1; /**< Relaxed Ordering for Reads. */ member in struct:cvmx_npei_mem_access_subidx::cvmx_npei_mem_access_subidx_s 5444 uint64_t ror : 1; 6441 uint64_t ror : 32; /**< When asserted '1' the vector bit cooresponding member in struct:cvmx_npei_pkt_data_out_ror::cvmx_npei_pkt_data_out_ror_s 6444 uint64_t ror : 32; 6620 uint64_t ror : 1; /**< Enables '1' Relaxed Ordering for reading of member in struct:cvmx_npei_pkt_input_control::cvmx_npei_pkt_input_control_s 6623 uint64_t ror : 1; 6986 uint64_t ror : 32; /**< When asserted '1' the vector bit cooresponding member in struct:cvmx_npei_pkt_slist_ror::cvmx_npei_pkt_slist_ror_s 6989 uint64_t ror : 32;
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H A D | cvmx-pcie.c | 671 mem_access_subid.s.ror = 0; /* Disable Relaxed Ordering for Reads. */ 1585 mem_access_subid.s.ror = 0; /* Disable Relaxed Ordering for Reads. */
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/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 1140 Shift = ARM_AM::ror; 1144 if (Shift == ARM_AM::ror && imm == 0) 1179 Shift = ARM_AM::ror; 1513 Opc = ARM_AM::ror; 1519 if (Opc == ARM_AM::ror && amt == 0) 1558 ShOp = ARM_AM::ror; 1562 if (ShOp == ARM_AM::ror && imm == 0)
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/freebsd-10.0-release/crypto/openssl/crypto/camellia/asm/ |
H A D | cmll-x86_64.pl | 101 ror \$8,$t3 # t3=RightRotate(t3,8)
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