Searched refs:bus_write_1 (Results 1 - 25 of 77) sorted by relevance

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/freebsd-10.0-release/sys/dev/ichsmb/
H A Dichsmb.c124 bus_write_1(sc->io_res, ICH_HST_STA, 0xff);
184 bus_write_1(sc->io_res, ICH_XMIT_SLVA,
187 bus_write_1(sc->io_res, ICH_HST_CNT,
210 bus_write_1(sc->io_res, ICH_XMIT_SLVA,
212 bus_write_1(sc->io_res, ICH_HST_CMD, byte);
213 bus_write_1(sc->io_res, ICH_HST_CNT,
232 bus_write_1(sc->io_res, ICH_XMIT_SLVA,
234 bus_write_1(sc->io_res, ICH_HST_CNT,
255 bus_write_1(sc->io_res, ICH_XMIT_SLVA,
257 bus_write_1(s
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/freebsd-10.0-release/sys/dev/ieee488/
H A Dupd7210.c85 bus_write_1(u->reg_res[reg], u->reg_offset[reg], val);
135 bus_write_1(u->irq_clear_res, 0, 42);
188 bus_write_1(u->reg_res[0], cnt0, -1);
189 bus_write_1(u->reg_res[0], cnt1, (-1) >> 8);
190 bus_write_1(u->reg_res[0], cnt2, (-1) >> 16);
191 bus_write_1(u->reg_res[0], cnt3, (-1) >> 24);
192 bus_write_1(u->reg_res[0], cmdr, 0x04); /* GO */
205 bus_write_1(u->reg_res[0], imr3, 0x00);
246 bus_write_1(u->reg_res[0], cmdr, 0x10); /* reset FIFO */
247 bus_write_1(
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H A Dibfoo.c235 bus_write_1(u->reg_res[0], cmdr, 0x04); /* GO */
246 bus_write_1(u->reg_res[0], fifob, *ib->buf);
253 bus_write_1(u->reg_res[0], cmdr, 0x04); /* GO */
256 bus_write_1(u->reg_res[0], imr3, 0x11); /* STOP IE, DONE IE */
264 bus_write_1(u->reg_res[0], imr3, 0x00);
265 bus_write_1(u->reg_res[0], cmdr, 0x22); /* soft RESET */
306 bus_write_1(u->reg_res[0], imr3, 0x00);
307 bus_write_1(u->reg_res[0], cmdr, 0x22); /* soft RESET */
349 bus_write_1(u->reg_res[0], imr3, 0x00);
411 bus_write_1(
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H A Dtnt4882.c190 bus_write_1(sc->res[1], tp->reg, tp->val);
268 bus_write_1(sc->res[1], imr3, 0x02);
285 bus_write_1(sc->res[0], hssel, 0x01); /* one-chip mode */
H A Dpcii.c188 bus_write_1(sc->res[2 + 3], 0, 0x55);
193 bus_write_1(sc->res[2 + 3], 0, 0xaa);
/freebsd-10.0-release/sys/arm/s3c2xx0/
H A Ds3c24x0_rtc.c77 bus_write_1(sc->mem_res, RTC_RTCCON, RTCCON_RTCEN);
132 bus_write_1(sc->mem_res, RTC_BCDSEC, TOBCD(ct.sec));
133 bus_write_1(sc->mem_res, RTC_BCDMIN, TOBCD(ct.min));
134 bus_write_1(sc->mem_res, RTC_BCDHOUR, TOBCD(ct.hour));
135 bus_write_1(sc->mem_res, RTC_BCDDATE, TOBCD(ct.day));
136 bus_write_1(sc->mem_res, RTC_BCDDAY, TOBCD(ct.dow));
137 bus_write_1(sc->mem_res, RTC_BCDMON, TOBCD(ct.mon));
138 bus_write_1(sc->mem_res, RTC_BCDYEAR, TOBCD(ct.year - YEAR_BASE));
/freebsd-10.0-release/sys/pci/
H A Dintpm.c224 bus_write_1(sc->io_res, PIIX4_SMBSLVCNT, PIIX4_SMBSLVCNT_ALTEN);
300 bus_write_1(sc->io_res, PIIX4_SMBSLVCNT, 0);
303 bus_write_1(sc->io_res, PIIX4_SMBHSTSTS,
322 bus_write_1(sc->io_res, PIIX4_SMBHSTCNT,
348 bus_write_1(sc->io_res, PIIX4_SMBSLVSTS,
366 bus_write_1(sc->io_res, PIIX4_SMBSLVCNT,
377 bus_write_1(sc->io_res, PIIX4_SMBHSTADD, SMBALTRESP | LSB);
388 bus_write_1(sc->io_res, PIIX4_SMBSLVCNT,
408 bus_write_1(sc->io_res, PIIX4_SMBHSTCNT, tmp);
463 bus_write_1(s
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/freebsd-10.0-release/sys/dev/ata/chipsets/
H A Data-fsl.c153 bus_write_1(ctrl->r_res1, 0x00, 3);
154 bus_write_1(ctrl->r_res1, 0x01, 3);
155 bus_write_1(ctrl->r_res1, 0x02, (25 + 15) / 15);
156 bus_write_1(ctrl->r_res1, 0x03, (70 + 15) / 15);
159 bus_write_1(ctrl->r_res1, 0x04, (70 + 15) / 15);
160 bus_write_1(ctrl->r_res1, 0x05, (50 + 15) / 15 + 2);
161 bus_write_1(ctrl->r_res1, 0x06, 1);
162 bus_write_1(ctrl->r_res1, 0x07, (10 + 15) / 15);
165 bus_write_1(ctrl->r_res1, 0x08, (10 + 15) / 15);
/freebsd-10.0-release/sys/dev/ppc/
H A Dppcreg.h171 #define w_dtr(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_SPP_DTR, byte))
172 #define w_str(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_SPP_STR, byte))
173 #define w_ctr(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_SPP_CTR, byte))
175 #define w_epp_A(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_EPP_ADDR, byte))
176 #define w_epp_D(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_EPP_DATA, byte))
177 #define w_ecr(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_ECP_ECR, byte))
178 #define w_fifo(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_ECP_D_FIFO, byte))
/freebsd-10.0-release/sys/dev/puc/
H A Dpucdata.c1256 bus_write_1(bar->b_res, 3, 0x80);
1258 bus_write_1(bar->b_res, 7, 0);
1262 bus_write_1(bar->b_res, 7, 0x80 + -cfg->clock);
1266 bus_write_1(bar->b_res, 3, 0);
1354 bus_write_1(bar->b_res, 0x250, 0x89);
1355 bus_write_1(bar->b_res, 0x3f0, 0x87);
1356 bus_write_1(bar->b_res, 0x3f0, 0x87);
1360 bus_write_1(bar->b_res, efir, 0x09);
1364 bus_write_1(bar->b_res, efir, 0x16);
1366 bus_write_1(ba
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/freebsd-10.0-release/sys/dev/asmc/
H A Dasmcvar.h60 bus_write_1(sc->sc_ioport, 0x00, val)
68 bus_write_1(sc->sc_ioport, 0x04, val)
/freebsd-10.0-release/sys/dev/pcf/
H A Dpcfvar.h101 bus_write_1(sc->res_ioport, 0, data);
109 bus_write_1(sc->res_ioport, 1, data);
/freebsd-10.0-release/sys/dev/mlx/
H A Dmlxreg.h81 #define MLX_V3_PUT_MAILBOX(sc, idx, val) bus_write_1(sc->mlx_mem, MLX_V3_MAILBOX + idx, val)
85 #define MLX_V3_PUT_IDBR(sc, val) bus_write_1(sc->mlx_mem, MLX_V3_IDBR, val)
87 #define MLX_V3_PUT_ODBR(sc, val) bus_write_1(sc->mlx_mem, MLX_V3_ODBR, val)
88 #define MLX_V3_PUT_IER(sc, val) bus_write_1(sc->mlx_mem, MLX_V3_IER, val)
90 #define MLX_V3_PUT_FWERROR(sc, val) bus_write_1(sc->mlx_mem, MLX_V3_FWERROR, val)
118 #define MLX_V4_PUT_MAILBOX(sc, idx, val) bus_write_1(sc->mlx_mem, MLX_V4_MAILBOX + idx, val)
127 #define MLX_V4_PUT_FWERROR(sc, val) bus_write_1(sc->mlx_mem, MLX_V4_FWERROR, val)
163 #define MLX_V5_PUT_MAILBOX(sc, idx, val) bus_write_1(sc->mlx_mem, MLX_V5_MAILBOX + idx, val)
167 #define MLX_V5_PUT_IDBR(sc, val) bus_write_1(sc->mlx_mem, MLX_V5_IDBR, val)
169 #define MLX_V5_PUT_ODBR(sc, val) bus_write_1(s
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/freebsd-10.0-release/sys/dev/xe/
H A Dif_xevar.h81 #define XE_OUTB(r, b) bus_write_1(scp->port_res, (r), (b))
/freebsd-10.0-release/sys/sparc64/ebus/
H A Depic.c82 bus_write_1((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_ADDR, (off));\
94 bus_write_1((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_ADDR, (off));\
98 bus_write_1((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_WRITE_MASK, \
103 bus_write_1((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_DATA, (val));\
/freebsd-10.0-release/sys/dev/glxiic/
H A Dglxiic.c501 bus_write_1(sc->smb_res, GLXIIC_SMB_STS, (GLXIIC_SMB_STS_SLVSTP_BIT |
518 bus_write_1(sc->smb_res, GLXIIC_SMB_CTRL1,
531 bus_write_1(sc->smb_res, GLXIIC_SMB_STS,
667 bus_write_1(sc->smb_res, GLXIIC_SMB_SDA, data);
747 bus_write_1(sc->smb_res, GLXIIC_SMB_SDA, slave);
774 bus_write_1(sc->smb_res, GLXIIC_SMB_STS,
783 bus_write_1(sc->smb_res, GLXIIC_SMB_SDA, *sc->data++);
817 bus_write_1(sc->smb_res, GLXIIC_SMB_CTRL1,
823 bus_write_1(sc->smb_res, GLXIIC_SMB_STS,
874 bus_write_1(s
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/freebsd-10.0-release/sys/dev/sn/
H A Dif_snvar.h61 bus_write_1((sc)->port_res, off, val)
/freebsd-10.0-release/sys/dev/ipmi/
H A Dipmivars.h196 #define bus_write_1(r, o, v) \ macro
204 bus_write_1((sc)->ipmi_io_res[0], (sc)->ipmi_io_spacing * (x), value)
210 bus_write_1((sc)->ipmi_io_res[(x)], 0, value)
/freebsd-10.0-release/sys/powerpc/powermac/
H A Dmacio.c621 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 5);
623 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 4);
631 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0b, 0);
632 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0a, 0x28);
633 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0d, 0x28);
634 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0d, 0x28);
635 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0e, 0x28);
H A Dmacgpio.c295 bus_write_1(sc->sc_gpios,dinfo->gpio_num,val);
319 bus_write_1(sc->sc_gpios,dinfo->gpio_num,val);
352 bus_write_1(sc->sc_gpios,dinfo->gpio_num,val);
/freebsd-10.0-release/sys/dev/bm/
H A Dif_bmreg.h160 bus_write_1(sc->sc_memr, reg, val)
/freebsd-10.0-release/sys/dev/ex/
H A Dif_exvar.h98 bus_write_1((sc)->ioport, off, val)
/freebsd-10.0-release/sys/dev/tx/
H A Dif_txvar.h135 bus_write_1((sc)->res, (reg), (val))
/freebsd-10.0-release/sys/dev/amdsbwd/
H A Damdsbwd.c158 bus_write_1(res, 0, reg); /* Index */
165 bus_write_1(res, 0, reg); /* Index */
166 bus_write_1(res, 1, val); /* Data */
/freebsd-10.0-release/sys/dev/an/
H A Dif_anreg.h52 #define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->port_res, reg, val)
63 #define CSR_MEM_WRITE_1(sc, reg, val) bus_write_1(sc->mem_res, reg, val)
77 bus_write_1(sc->mem_aux_res, reg, val)

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