Searched refs:SetCC (Results 1 - 7 of 7) sorted by relevance

/freebsd-10.0-release/contrib/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp415 SDValue SetCC = N->getOperand(0);
417 if (SetCC.getOpcode() != MipsISD::SETCC_DSP)
421 SetCC.getOperand(0), SetCC.getOperand(1), N->getOperand(1),
422 N->getOperand(2), SetCC.getOperand(2));
H A DMipsISelLowering.cpp531 SDValue SetCC = N->getOperand(0);
533 if ((SetCC.getOpcode() != ISD::SETCC) ||
534 !SetCC.getOperand(0).getValueType().isInteger())
549 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get();
552 SetCC = DAG.getSetCC(DL, SetCC.getValueType(), SetCC.getOperand(0),
553 SetCC.getOperand(1), ISD::getSetCCInverse(CC, true));
555 return DAG.getNode(ISD::SELECT, DL, FalseTy, SetCC, False, True);
/freebsd-10.0-release/contrib/llvm/lib/Target/R600/
H A DSIISelLowering.cpp276 SDNode *SetCC = Intr; local
277 assert(SetCC->getConstantOperandVal(1) == 1);
278 assert(cast<CondCodeSDNode>(SetCC->getOperand(2).getNode())->get() ==
280 Intr = SetCC->getOperand(0).getNode();
/freebsd-10.0-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1756 SDValue SetCC = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, LHS, RHS, local
1759 Chain, SetCC, A64cc, DestBB);
1764 A64BR_CC, SetCC, A64cc, DestBB);
2201 SDValue SetCC = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, LHS, RHS, local
2205 SetCC, IfTrue, IfFalse, A64cc);
2210 SetCC, IfTrue, A64SELECT_CC, A64cc);
/freebsd-10.0-release/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp9436 assert(VT == MVT::i8 && "SetCC type must be 8-bit integer");
10411 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, local
10413 return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);
10708 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, CC, Test); local
10709 return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);
10865 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, local
10868 return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);
10995 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, local
10998 SDValue Ret = DAG.getNode(ISD::ZERO_EXTEND, dl, Op->getValueType(0), SetCC);
12040 SDValue SetCC local
12053 SDValue SetCC = local
15877 SDValue SetCC; local
[all...]
/freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp566 // isOneUseSetCC - Return true if this is a SetCC-equivalent operation with only
3418 llvm_unreachable("Unhandled SetCC Equivalent!");
4318 // Extend SetCC uses if necessary.
4320 SDNode *SetCC = SetCCs[i]; local
4324 SDValue SOp = SetCC->getOperand(j);
4331 Ops.push_back(SetCC->getOperand(2));
4332 CombineTo(SetCC, DAG.getNode(ISD::SETCC, DL, SetCC->getValueType(0),
6813 SDValue SetCC = local
6820 MVT::Other, Chain, SetCC, N
6886 SDValue SetCC = DAG.getSetCC(TheXor->getDebugLoc(), local
[all...]
H A DLegalizeIntegerTypes.cpp494 // Promote all the way up to the canonical SetCC type.
525 SDValue SetCC = DAG.getNode(N->getOpcode(), dl, SVT, N->getOperand(0), local
530 return DAG.getNode(ISD::TRUNCATE, dl, NVT, SetCC);
883 // Promote all the way up to the canonical SetCC type.
975 // Promote all the way up to the canonical SetCC type.

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