/freebsd-10.0-release/contrib/llvm/lib/MC/ |
H A D | MCRegisterInfo.cpp | 49 int MCRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { 53 DwarfLLVMRegPair Key = { RegNum, 0 }; 55 if (I == M+Size || I->FromReg != RegNum) 60 int MCRegisterInfo::getLLVMRegNum(unsigned RegNum, bool isEH) const { 64 DwarfLLVMRegPair Key = { RegNum, 0 }; 66 assert(I != M+Size && I->FromReg == RegNum && "Invalid RegNum"); 70 int MCRegisterInfo::getSEHRegNum(unsigned RegNum) const { 71 const DenseMap<unsigned, int>::const_iterator I = L2SEHRegs.find(RegNum); 72 if (I == L2SEHRegs.end()) return (int)RegNum; [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/NVPTX/ |
H A D | NVPTXRegisterInfo.h | 58 virtual int getDwarfRegNum(unsigned RegNum, bool isEH) const;
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H A D | NVPTXRegisterInfo.cpp | 123 int NVPTXRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { argument
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/freebsd-10.0-release/contrib/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.h | 66 int getCompactUnwindRegNum(unsigned RegNum, bool isEH) const;
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H A D | X86CodeEmitter.cpp | 1479 unsigned RegNum = getX86RegNum(MO.getReg()) << 4; 1481 RegNum |= 1 << 7; 1489 RegNum |= Val; 1492 emitConstant(RegNum, 1);
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H A D | X86RegisterInfo.cpp | 90 int X86RegisterInfo::getCompactUnwindRegNum(unsigned RegNum, bool isEH) const { argument 91 switch (getLLVMRegNum(RegNum, isEH)) {
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/freebsd-10.0-release/contrib/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 162 int matchRegisterByNumber(unsigned RegNum, unsigned RegClass); 233 unsigned RegNum; member in struct:__anon2430::MipsOperand::RegOp 298 return Reg.RegNum; 330 static MipsOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) { argument 332 Op->Reg.RegNum = RegNum; 360 Inst.addOperand(MCOperand::CreateReg(Reg.RegNum)); 367 Inst.addOperand(MCOperand::CreateReg(Reg.RegNum)); 375 Inst.addOperand(MCOperand::CreateReg(Reg.RegNum)); 383 Inst.addOperand(MCOperand::CreateReg(Reg.RegNum)); 885 matchRegisterByNumber(unsigned RegNum, unsigned RegClass) argument 895 int RegNum = -1; local 1294 int RegNum = matchRegisterName(DefSymbol.substr(1), isMips64()); local 1354 unsigned RegNum = Tok.getIntVal(); local 1384 unsigned RegNum = Tok.getIntVal(); local 1400 unsigned RegNum; local [all...] |
/freebsd-10.0-release/contrib/llvm/include/llvm/MC/ |
H A D | MCRegisterInfo.h | 365 int getDwarfRegNum(unsigned RegNum, bool isEH) const; 368 int getLLVMRegNum(unsigned RegNum, bool isEH) const; 372 int getSEHRegNum(unsigned RegNum) const;
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/freebsd-10.0-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsAsmPrinter.cpp | 157 unsigned RegNum = TM.getRegisterInfo()->getEncodingValue(Reg); local 159 FPUBitmask |= (3 << RegNum); 165 FPUBitmask |= (1 << RegNum); 172 unsigned RegNum = TM.getRegisterInfo()->getEncodingValue(Reg); local 173 CPUBitmask |= (1 << RegNum);
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/freebsd-10.0-release/contrib/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 137 IdentifyRegister(unsigned &RegNum, SMLoc &RegEndLoc, StringRef &LayoutSpec, 182 unsigned RegNum; member in struct:__anon2339::AArch64Operand::RegOp 232 return Reg.RegNum; 739 static AArch64Operand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) { argument 741 Op->Reg.RegNum = RegNum; 745 static AArch64Operand *CreateWrappedReg(unsigned RegNum, SMLoc S, SMLoc E) { argument 747 Op->Reg.RegNum = RegNum; 1429 AArch64AsmParser::IdentifyRegister(unsigned &RegNum, SMLo argument 1485 unsigned RegNum; local 1611 unsigned RegNum; local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/MBlaze/ |
H A D | MBlazeAsmPrinter.cpp | 137 unsigned RegNum = getMBlazeRegisterNumbering(Reg); local 139 CPUBitmask |= (1 << RegNum);
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/freebsd-10.0-release/contrib/llvm/lib/Target/MBlaze/AsmParser/ |
H A D | MBlazeAsmParser.cpp | 91 unsigned RegNum; member in struct:__anon2407::MBlazeOperand::RegOp 149 return Reg.RegNum; 236 static MBlazeOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) { argument 238 Op->Reg.RegNum = RegNum;
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/freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCCTRLoops.cpp | 141 unsigned RegNum; member in union:__anon2461::CountValue::Values 143 Values(unsigned r) : RegNum(r) {} 160 return Contents.RegNum; 163 Contents.RegNum = Val;
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H A D | PPCISelLowering.cpp | 1863 unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); local 1867 // allocated yet. RegNum is actually an index into ArgRegs, which means we 1868 // need to skip a register if RegNum is odd. 1869 if (RegNum != NumArgRegs && RegNum % 2 == 1) { 1870 State.AllocateReg(ArgRegs[RegNum]); 1891 unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); local 1895 if (RegNum != NumArgRegs && ArgRegs[RegNum] == PPC::F8) { 1896 State.AllocateReg(ArgRegs[RegNum]); [all...] |
/freebsd-10.0-release/contrib/llvm/tools/clang/lib/Basic/ |
H A D | TargetInfo.cpp | 249 if (AddlNames[i].Names[j] == Name && AddlNames[i].RegNum < NumNames) 302 if (AddlNames[i].Names[j] == Name && AddlNames[i].RegNum < NumNames)
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/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 353 unsigned RegNum; member in struct:__anon2374::ARMOperand::RegOp 358 unsigned RegNum; member in struct:__anon2374::ARMOperand::VectorListOp 387 unsigned RegNum; member in struct:__anon2374::ARMOperand::PostIdxRegOp 543 return Reg.RegNum; 1179 .contains(VectorList.RegNum)); 1195 .contains(VectorList.RegNum)); 1222 .contains(VectorList.RegNum)); 1449 unsigned RegNum = getCondCode() == ARMCC::AL ? 0: ARM::CPSR; local 1450 Inst.addOperand(MCOperand::CreateReg(RegNum)); 1786 Inst.addOperand(MCOperand::CreateReg(PostIdxReg.RegNum)); 2149 CreateCCOut(unsigned RegNum, SMLoc S) argument 2166 CreateReg(unsigned RegNum, SMLoc S, SMLoc E) argument 2251 CreateVectorList(unsigned RegNum, unsigned Count, bool isDoubleSpaced, SMLoc S, SMLoc E) argument 2262 CreateVectorListAllLanes(unsigned RegNum, unsigned Count, bool isDoubleSpaced, SMLoc S, SMLoc E) argument 2274 CreateVectorListIndexed(unsigned RegNum, unsigned Count, unsigned Index, bool isDoubleSpaced, SMLoc S, SMLoc E) argument 2326 CreatePostIdxReg(unsigned RegNum, bool isAdd, ARM_AM::ShiftOpc ShiftTy, unsigned ShiftImm, SMLoc S, SMLoc E) argument 2511 unsigned RegNum = MatchRegisterName(lowerCase); local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/AArch64/InstPrinter/ |
H A D | AArch64InstPrinter.h | 37 void printRegName(raw_ostream &O, unsigned RegNum) const;
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/freebsd-10.0-release/contrib/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86MCCodeEmitter.cpp | 1196 unsigned RegNum = GetX86RegNum(MO) << 4; local 1198 RegNum |= 1 << 7; 1206 RegNum |= Val; 1209 EmitImmediate(MCOperand::CreateImm(RegNum), MI.getLoc(), 1, FK_Data_1,
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/freebsd-10.0-release/contrib/llvm/tools/clang/include/clang/Basic/ |
H A D | TargetInfo.h | 573 const unsigned RegNum; member in struct:clang::TargetInfo::AddlRegName
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/freebsd-10.0-release/contrib/llvm/lib/Target/R600/ |
H A D | AMDILCFGStructurizer.cpp | 282 void addLoopBreakOnReg(LoopT *LoopRep, RegiT RegNum); 283 void addLoopContOnReg(LoopT *LoopRep, RegiT RegNum); 284 void addLoopBreakInitReg(LoopT *LoopRep, RegiT RegNum); 285 void addLoopContInitReg(LoopT *LoopRep, RegiT RegNum); 286 void addLoopEndbranchInitReg(LoopT *LoopRep, RegiT RegNum);
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/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMCodeEmitter.cpp | 1300 unsigned RegNum = II->getRegisterInfo().getEncodingValue(MO.getReg()); local 1302 RegNum < 16); 1303 Binary |= 0x1 << RegNum;
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H A D | ARMLoadStoreOptimizer.cpp | 485 unsigned RegNum = MO.isUndef() ? UINT_MAX : TRI->getEncodingValue(Reg); local 491 ((isNotVFP && RegNum > PRegNum) || 492 ((Count < Limit) && RegNum == PRegNum+1))) { 494 PRegNum = RegNum;
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H A D | ARMISelDAGToDAG.cpp | 3489 unsigned RegNum = InlineAsm::getNumOperandRegisters(Flag); local 3492 if (!HasRC || RC != ARM::GPRRegClassID || RegNum != 2) 3556 Flag = InlineAsm::getFlagWord(Kind, 1 /* RegNum*/);
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/freebsd-10.0-release/contrib/llvm/utils/TableGen/ |
H A D | CodeGenRegisters.cpp | 1288 unsigned RegNum = Registers[i]->EnumValue; local 1289 if (AllocatableRegs.count(RegNum)) 1292 UberSetIDs.join(0, RegNum);
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/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/InstPrinter/ |
H A D | ARMInstPrinter.cpp | 957 if (unsigned RegNum = MO2.getReg()) { 959 printRegName(O, RegNum);
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