1249259Sdim//===-- AArch64InstPrinter.h - Convert AArch64 MCInst to assembly syntax --===// 2249259Sdim// 3249259Sdim// The LLVM Compiler Infrastructure 4249259Sdim// 5249259Sdim// This file is distributed under the University of Illinois Open Source 6249259Sdim// License. See LICENSE.TXT for details. 7249259Sdim// 8249259Sdim//===----------------------------------------------------------------------===// 9249259Sdim// 10249259Sdim// This class prints an AArch64 MCInst to a .s file. 11249259Sdim// 12249259Sdim//===----------------------------------------------------------------------===// 13249259Sdim 14249259Sdim#ifndef LLVM_AARCH64INSTPRINTER_H 15249259Sdim#define LLVM_AARCH64INSTPRINTER_H 16249259Sdim 17249259Sdim#include "MCTargetDesc/AArch64MCTargetDesc.h" 18249259Sdim#include "Utils/AArch64BaseInfo.h" 19249259Sdim#include "llvm/MC/MCInstPrinter.h" 20249259Sdim#include "llvm/MC/MCSubtargetInfo.h" 21249259Sdim 22249259Sdimnamespace llvm { 23249259Sdim 24249259Sdimclass MCOperand; 25249259Sdim 26249259Sdimclass AArch64InstPrinter : public MCInstPrinter { 27249259Sdimpublic: 28249259Sdim AArch64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, 29249259Sdim const MCRegisterInfo &MRI, const MCSubtargetInfo &STI); 30249259Sdim 31249259Sdim // Autogenerated by tblgen 32249259Sdim void printInstruction(const MCInst *MI, raw_ostream &O); 33249259Sdim bool printAliasInstr(const MCInst *MI, raw_ostream &O); 34249259Sdim static const char *getRegisterName(unsigned RegNo); 35249259Sdim static const char *getInstructionName(unsigned Opcode); 36249259Sdim 37249259Sdim void printRegName(raw_ostream &O, unsigned RegNum) const; 38249259Sdim 39249259Sdim template<unsigned MemSize, unsigned RmSize> 40249259Sdim void printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, 41249259Sdim raw_ostream &O) { 42249259Sdim printAddrRegExtendOperand(MI, OpNum, O, MemSize, RmSize); 43249259Sdim } 44249259Sdim 45249259Sdim 46249259Sdim void printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, 47249259Sdim raw_ostream &O, unsigned MemSize, 48249259Sdim unsigned RmSize); 49249259Sdim 50249259Sdim void printAddSubImmLSL0Operand(const MCInst *MI, 51249259Sdim unsigned OpNum, raw_ostream &O); 52249259Sdim void printAddSubImmLSL12Operand(const MCInst *MI, 53249259Sdim unsigned OpNum, raw_ostream &O); 54249259Sdim 55249259Sdim void printBareImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 56249259Sdim 57249259Sdim template<unsigned RegWidth> 58249259Sdim void printBFILSBOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 59249259Sdim void printBFIWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 60249259Sdim void printBFXWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 61249259Sdim 62249259Sdim 63249259Sdim void printCondCodeOperand(const MCInst *MI, unsigned OpNum, 64249259Sdim raw_ostream &O); 65249259Sdim 66249259Sdim void printCRxOperand(const MCInst *MI, unsigned OpNum, 67249259Sdim raw_ostream &O); 68249259Sdim 69249259Sdim void printCVTFixedPosOperand(const MCInst *MI, unsigned OpNum, 70249259Sdim raw_ostream &O); 71249259Sdim 72249259Sdim void printFPImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &o); 73249259Sdim 74249259Sdim void printFPZeroOperand(const MCInst *MI, unsigned OpNum, raw_ostream &o); 75249259Sdim 76249259Sdim template<int MemScale> 77249259Sdim void printOffsetUImm12Operand(const MCInst *MI, 78249259Sdim unsigned OpNum, raw_ostream &o) { 79249259Sdim printOffsetUImm12Operand(MI, OpNum, o, MemScale); 80249259Sdim } 81249259Sdim 82249259Sdim void printOffsetUImm12Operand(const MCInst *MI, unsigned OpNum, 83249259Sdim raw_ostream &o, int MemScale); 84249259Sdim 85249259Sdim template<unsigned field_width, unsigned scale> 86249259Sdim void printLabelOperand(const MCInst *MI, unsigned OpNum, 87249259Sdim raw_ostream &O); 88249259Sdim 89249259Sdim template<unsigned RegWidth> 90249259Sdim void printLogicalImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 91249259Sdim 92249259Sdim template<typename SomeNamedImmMapper> 93249259Sdim void printNamedImmOperand(const MCInst *MI, unsigned OpNum, 94249259Sdim raw_ostream &O) { 95249259Sdim printNamedImmOperand(SomeNamedImmMapper(), MI, OpNum, O); 96249259Sdim } 97249259Sdim 98249259Sdim void printNamedImmOperand(const NamedImmMapper &Mapper, 99249259Sdim const MCInst *MI, unsigned OpNum, 100249259Sdim raw_ostream &O); 101249259Sdim 102249259Sdim void printSysRegOperand(const A64SysReg::SysRegMapper &Mapper, 103249259Sdim const MCInst *MI, unsigned OpNum, 104249259Sdim raw_ostream &O); 105249259Sdim 106249259Sdim void printMRSOperand(const MCInst *MI, unsigned OpNum, 107249259Sdim raw_ostream &O) { 108249259Sdim printSysRegOperand(A64SysReg::MRSMapper(), MI, OpNum, O); 109249259Sdim } 110249259Sdim 111249259Sdim void printMSROperand(const MCInst *MI, unsigned OpNum, 112249259Sdim raw_ostream &O) { 113249259Sdim printSysRegOperand(A64SysReg::MSRMapper(), MI, OpNum, O); 114249259Sdim } 115249259Sdim 116249259Sdim void printShiftOperand(const char *name, const MCInst *MI, 117249259Sdim unsigned OpIdx, raw_ostream &O); 118249259Sdim 119249259Sdim void printLSLOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 120249259Sdim 121249259Sdim void printLSROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { 122249259Sdim printShiftOperand("lsr", MI, OpNum, O); 123249259Sdim } 124249259Sdim void printASROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { 125249259Sdim printShiftOperand("asr", MI, OpNum, O); 126249259Sdim } 127249259Sdim void printROROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { 128249259Sdim printShiftOperand("ror", MI, OpNum, O); 129249259Sdim } 130249259Sdim 131249259Sdim template<A64SE::ShiftExtSpecifiers Shift> 132249259Sdim void printShiftOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { 133249259Sdim printShiftOperand(MI, OpNum, O, Shift); 134249259Sdim } 135249259Sdim 136249259Sdim void printShiftOperand(const MCInst *MI, unsigned OpNum, 137249259Sdim raw_ostream &O, A64SE::ShiftExtSpecifiers Sh); 138249259Sdim 139249259Sdim 140249259Sdim void printMoveWideImmOperand(const MCInst *MI, unsigned OpNum, 141249259Sdim raw_ostream &O); 142249259Sdim 143249259Sdim template<int MemSize> void 144249259Sdim printSImm7ScaledOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 145249259Sdim 146249259Sdim void printOffsetSImm9Operand(const MCInst *MI, unsigned OpNum, 147249259Sdim raw_ostream &O); 148249259Sdim 149249259Sdim void printPRFMOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 150249259Sdim 151249259Sdim template<A64SE::ShiftExtSpecifiers EXT> 152249259Sdim void printRegExtendOperand(const MCInst *MI, unsigned OpNum, 153249259Sdim raw_ostream &O) { 154249259Sdim printRegExtendOperand(MI, OpNum, O, EXT); 155249259Sdim } 156249259Sdim 157249259Sdim void printRegExtendOperand(const MCInst *MI, unsigned OpNum, 158249259Sdim raw_ostream &O, A64SE::ShiftExtSpecifiers Ext); 159249259Sdim 160249259Sdim void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 161249259Sdim virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot); 162249259Sdim 163249259Sdim bool isStackReg(unsigned RegNo) { 164249259Sdim return RegNo == AArch64::XSP || RegNo == AArch64::WSP; 165249259Sdim } 166249259Sdim 167249259Sdim 168249259Sdim}; 169249259Sdim 170249259Sdim} 171249259Sdim 172249259Sdim#endif 173