Searched refs:Op1 (Results 1 - 25 of 67) sorted by relevance

123

/freebsd-10.0-release/contrib/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp252 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) { argument
264 Op1 = (Op1High << 2) | fieldFromInstruction(Insn, 2, 2);
270 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, argument
279 Op1 = (Op1High << 2) | fieldFromInstruction(Insn, 4, 2);
358 unsigned Op1, Op2; local
359 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
363 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
371 unsigned Op1, Op2; local
372 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
376 Inst.addOperand(MCOperand::CreateImm(Op1));
384 unsigned Op1, Op2; local
397 unsigned Op1, Op2; local
411 unsigned Op1, Op2; local
424 unsigned Op1, Op2; local
437 unsigned Op1, Op2; local
522 unsigned Op1, Op2; local
536 unsigned Op1, Op2; local
550 unsigned Op1, Op2, Op3; local
563 unsigned Op1, Op2, Op3; local
576 unsigned Op1, Op2, Op3; local
589 unsigned Op1, Op2, Op3; local
602 unsigned Op1, Op2, Op3; local
616 unsigned Op1, Op2, Op3; local
631 unsigned Op1, Op2, Op3; local
645 unsigned Op1, Op2, Op3; local
659 unsigned Op1, Op2, Op3, Op4, Op5, Op6; local
693 unsigned Op1, Op2, Op3, Op4, Op5; local
713 unsigned Op1, Op2, Op3; local
732 unsigned Op1, Op2, Op3; local
[all...]
/freebsd-10.0-release/contrib/llvm/lib/Transforms/InstCombine/
H A DInstCombineMulDivRem.cpp100 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
102 if (Value *V = SimplifyMulInst(Op0, Op1, TD))
108 if (match(Op1, m_AllOnes())) // X * -1 == 0 - X
111 if (ConstantInt *CI = dyn_cast<ConstantInt>(Op1)) {
163 if (isa<Constant>(Op1)) {
175 if (Value *Op1v = dyn_castNegVal(Op1))
181 Value *Op1C = Op1;
187 BO = dyn_cast<BinaryOperator>(Op1);
219 return BinaryOperator::CreateAnd(Op0, Op1);
226 return BinaryOperator::CreateShl(Op1,
372 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
642 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
707 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
793 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
874 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
990 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1022 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1065 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1136 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
[all...]
H A DInstCombineShifts.cpp24 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
32 if (SelectInst *SI = dyn_cast<SelectInst>(Op1))
36 if (ConstantInt *CUI = dyn_cast<ConstantInt>(Op1))
44 if (Op1->hasOneUse() && match(Op1, m_SRem(m_Value(A), m_Power2(B)))) {
48 Op1->getName());
312 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, ConstantInt *Op1, argument
320 CanEvaluateShifted(Op0, Op1->getZExtValue(), isLeftShift, *this)) {
325 GetShiftedValue(Op0, Op1->getZExtValue(), isLeftShift, *this));
336 if (Op1
[all...]
H A DInstCombineCompares.cpp1920 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1925 if (getComplexity(Op0) < getComplexity(Op1)) {
1927 std::swap(Op0, Op1);
1931 if (Value *V = SimplifyICmpInst(I.getPredicate(), Op0, Op1, TD))
1936 if (I.getPredicate() == ICmpInst::ICMP_NE && match(Op1, m_Zero()))
1943 return CmpInst::Create(Instruction::ICmp, I.getPredicate(), V, Op1);
1947 return CmpInst::Create(Instruction::ICmp, I.getPredicate(), V, Op1);
1959 Value *Xor = Builder->CreateXor(Op0, Op1, I.getName()+"tmp");
1963 return BinaryOperator::CreateXor(Op0, Op1);
1966 std::swap(Op0, Op1); // Chang
2334 Value *Op1 = 0, *Op2 = 0; local
3042 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
3132 Value *Op1 = 0, *Op2 = 0; local
[all...]
H A DInstCombineAddSub.cpp1346 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1348 if (Value *V = SimplifySubInst(Op0, Op1, I.hasNoSignedWrap(),
1357 if (Value *V = dyn_castNegVal(Op1)) {
1365 return BinaryOperator::CreateXor(Op0, Op1);
1369 return BinaryOperator::CreateNot(Op1);
1374 if (match(Op1, m_Not(m_Value(X))))
1381 if (match(Op1, m_LShr(m_Value(X), m_ConstantInt(CI))) &&
1386 if (match(Op1, m_AShr(m_Value(X), m_ConstantInt(CI))) &&
1393 if (SelectInst *SI = dyn_cast<SelectInst>(Op1))
1399 if (match(Op1, m_Ad
1514 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
[all...]
H A DInstCombineAndOrXor.cpp713 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); local
716 return getNewICmpValue(isSigned, Code, Op0, Op1, Builder);
1014 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1016 if (Value *V = SimplifyAndInst(Op0, Op1, TD))
1028 if (ConstantInt *AndRHS = dyn_cast<ConstantInt>(Op1)) {
1135 if (Value *Op1NotVal = dyn_castNotVal(Op1))
1136 if (Op0->hasOneUse() && Op1->hasOneUse()) {
1146 match(Op1, m_Not(m_And(m_Value(C), m_Value(D)))) &&
1151 if (match(Op1, m_Or(m_Value(A), m_Value(B))) &&
1159 Value *tmpOp1 = Op1;
1471 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); local
1758 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
2095 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
2329 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); local
[all...]
H A DInstructionCombining.cpp214 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(I.getOperand(1)); local
247 if (Op1 && Op1->getOpcode() == Opcode) {
249 Value *B = Op1->getOperand(0);
250 Value *C = Op1->getOperand(1);
289 if (Op1 && Op1->getOpcode() == Opcode) {
291 Value *B = Op1->getOperand(0);
292 Value *C = Op1->getOperand(1);
310 if (Op0 && Op1
399 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS); local
565 Value *Op0 = SO, *Op1 = ConstOperand; local
[all...]
/freebsd-10.0-release/contrib/llvm/lib/Analysis/
H A DInstructionSimplify.cpp160 if (BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS))
161 if (Op1->getOpcode() == OpcodeToExpand) {
163 Value *A = LHS, *B = Op1->getOperand(0), *C = Op1->getOperand(1);
198 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS); local
201 !Op1 || Op1->getOpcode() != OpcodeToExtract)
206 Value *C = Op1->getOperand(0), *D = Op1->getOperand(1);
269 BinaryOperator *Op1 local
592 SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
653 SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
733 SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
858 SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
867 SimplifyFAddInst(Value *Op0, Value *Op1, FastMathFlags FMF, const Query &Q, unsigned MaxRecurse) argument
909 SimplifyFSubInst(Value *Op0, Value *Op1, FastMathFlags FMF, const Query &Q, unsigned MaxRecurse) argument
945 SimplifyFMulInst(Value *Op0, Value *Op1, FastMathFlags FMF, const Query &Q, unsigned MaxRecurse) argument
973 SimplifyMulInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1036 SimplifyFAddInst(Value *Op0, Value *Op1, FastMathFlags FMF, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1042 SimplifyFSubInst(Value *Op0, Value *Op1, FastMathFlags FMF, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1048 SimplifyFMulInst(Value *Op0, Value *Op1, FastMathFlags FMF, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1056 SimplifyMulInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1064 SimplifyDiv(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1136 SimplifySDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1144 SimplifySDivInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1152 SimplifyUDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1160 SimplifyUDivInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1166 SimplifyFDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned) argument
1179 SimplifyFDivInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1187 SimplifyRem(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1241 SimplifySRemInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1249 SimplifySRemInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1257 SimplifyURemInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1265 SimplifyURemInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1271 SimplifyFRemInst(Value *Op0, Value *Op1, const Query &, unsigned) argument
1284 SimplifyFRemInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1292 SimplifyShift(unsigned Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1336 SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
1352 SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1361 SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, const Query &Q, unsigned MaxRecurse) argument
1379 SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1389 SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, const Query &Q, unsigned MaxRecurse) argument
1411 SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1421 SimplifyAndInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1512 SimplifyAndInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1520 SimplifyOrInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1606 SimplifyOrInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1614 SimplifyXorInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1666 SimplifyXorInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
[all...]
H A DConstantFolding.cpp540 /// SymbolicallyEvaluateBinop - One of Op0/Op1 is a constant expression.
545 Constant *Op1, const DataLayout *DL){
558 ComputeMaskedBits(Op1, KnownZero1, KnownOne1, DL);
564 // All the bits of Op1 that the 'and' could be masking are already zero.
565 return Op1;
584 if (IsConstantOffsetFromGlobal(Op1, GV2, Offs2, *DL) &&
1476 if (ConstantFP *Op1 = dyn_cast<ConstantFP>(Operands[0])) {
1481 Op1V = Op1->getValueAPF().convertToFloat();
1483 Op1V = Op1->getValueAPF().convertToDouble();
1486 APFloat APF = Op1
544 SymbolicallyEvaluateBinop(unsigned Opc, Constant *Op0, Constant *Op1, const DataLayout *DL) argument
[all...]
/freebsd-10.0-release/contrib/llvm/include/llvm/Target/
H A DTargetSelectionDAGInfo.h59 SDValue Op1, SDValue Op2,
76 SDValue Op1, SDValue Op2,
92 SDValue Op1, SDValue Op2,
57 EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
74 EmitTargetCodeForMemmove(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
90 EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo) const argument
/freebsd-10.0-release/sys/contrib/dev/acpica/compiler/
H A Dasltree.c884 * PARAMETERS: Op1 - First peer
887 * RETURN: Op1 or the non-null node.
895 ACPI_PARSE_OBJECT *Op1,
903 Op1, Op1 ? UtGetOpName(Op1->Asl.ParseOpcode) : NULL,
907 if ((!Op1) && (!Op2))
910 return (Op1);
917 return (Op1);
920 if (!Op1)
894 TrLinkPeerNode( ACPI_PARSE_OBJECT *Op1, ACPI_PARSE_OBJECT *Op2) argument
1031 TrLinkChildNode( ACPI_PARSE_OBJECT *Op1, ACPI_PARSE_OBJECT *Op2) argument
[all...]
/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.h60 SDValue Op1, SDValue Op2,
/freebsd-10.0-release/contrib/llvm/include/llvm/CodeGen/
H A DFastISel.h214 unsigned Op1, bool Op1IsKill);
244 unsigned Op1, bool Op1IsKill,
291 unsigned Op1, bool Op1IsKill);
299 unsigned Op1, bool Op1IsKill,
332 unsigned Op1, bool Op1IsKill,
341 unsigned Op1, bool Op1IsKill,
H A DSelectionDAG.h530 SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2, argument
535 Ops.push_back(Op1);
755 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2);
756 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
758 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
760 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
770 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT, SDValue Op1);
772 SDValue Op1, SDValue Op2);
774 SDValue Op1, SDValue Op2, SDValue Op3);
786 EVT VT2, SDValue Op1);
[all...]
H A DISDOpcodes.h791 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
797 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
/freebsd-10.0-release/contrib/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp198 SDValue Op0, Op1; local
202 if (!SelectADDRrr(Op, Op0, Op1))
203 SelectADDRri(Op, Op0, Op1);
208 OutOps.push_back(Op1);
/freebsd-10.0-release/contrib/llvm/lib/Transforms/Scalar/
H A DCorrelatedValuePropagation.cpp168 Constant *Op1 = dyn_cast<Constant>(C->getOperand(1));
169 if (!Op1) return false;
175 C->getOperand(0), Op1, *PI, C->getParent());
181 C->getOperand(0), Op1, *PI, C->getParent());
/freebsd-10.0-release/contrib/llvm/lib/Target/SystemZ/
H A DSystemZISelDAGToDAG.cpp294 // The base or index of AM is equivalent to Op0 + Op1, where IsBase selects
295 // between the base and index. Try to fold Op1 into AM's displacement.
297 SDValue Op0, ConstantSDNode *Op1) {
299 int64_t TestDisp = AM.Disp + Op1->getSExtValue();
321 SDValue Op1 = N.getOperand(1); local
324 unsigned Op1Code = Op1->getOpcode();
327 return expandAdjDynAlloc(AM, IsBase, Op1);
332 return expandDisp(AM, IsBase, Op1, cast<ConstantSDNode>(Op0));
334 return expandDisp(AM, IsBase, Op0, cast<ConstantSDNode>(Op1));
336 if (IsBase && expandIndex(AM, Op0, Op1))
296 expandDisp(SystemZAddressingMode &AM, bool IsBase, SDValue Op0, ConstantSDNode *Op1) argument
[all...]
/freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp580 SDValue Op1 = Op.getOperand(1); local
584 && Op1.getValueType() == Op2.getValueType() && "Invalid type");
602 assert(MaskTy.getSizeInBits() == Op1.getValueType().getSizeInBits()
619 Op1 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op1);
626 Op1 = DAG.getNode(ISD::AND, DL, MaskTy, Op1, Mask);
628 SDValue Val = DAG.getNode(ISD::OR, DL, MaskTy, Op1, Op2);
659 SDValue Op1 = Op.getOperand(1); local
676 assert(VT.getSizeInBits() == Op1
[all...]
H A DFastISel.cpp383 unsigned Op1 = getRegForValue(I->getOperand(1)); local
384 if (Op1 == 0) return false;
388 unsigned ResultReg = FastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1,
444 unsigned Op1 = getRegForValue(I->getOperand(1)); local
445 if (Op1 == 0)
455 Op1, Op1IsKill);
1114 unsigned /*Op1*/, bool /*Op1IsKill*/) {
1144 unsigned /*Op1*/, bool /*Op1IsKill*/,
1226 unsigned Op1, bool Op1IsKill) {
1233 .addReg(Op1, Op1IsKil
1223 FastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) argument
1244 FastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, unsigned Op2, bool Op2IsKill) argument
1333 FastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm) argument
1357 FastEmitInst_rrii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm1, uint64_t Imm2) argument
[all...]
/freebsd-10.0-release/contrib/llvm/include/llvm/Analysis/
H A DInstructionSimplify.h128 Value *SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
135 Value *SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact,
142 Value *SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact,
/freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp399 SDValue Op1 = N->getOperand(1); local
404 CurDAG->ComputeMaskedBits(Op1, RKZ, RKO);
411 unsigned Op1Opc = Op1.getOpcode();
421 if (Op1.getOperand(0).getOpcode() != ISD::SHL &&
422 Op1.getOperand(0).getOpcode() != ISD::SRL) {
423 std::swap(Op0, Op1);
429 if (Op1Opc == ISD::AND && Op1.getOperand(0).getOpcode() != ISD::SHL &&
430 Op1.getOperand(0).getOpcode() != ISD::SRL) {
431 std::swap(Op0, Op1);
442 isInt32Immediate(Op1
[all...]
/freebsd-10.0-release/contrib/llvm/lib/Target/X86/
H A DX86FloatingPoint.cpp1166 unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1));
1168 bool KillsOp1 = MI->killsRegister(X86::FP0+Op1);
1175 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS?
1183 moveToTop(Op1, I);
1184 TOS = Op1;
1206 assert((TOS == Op0 || TOS == Op1) && (KillsOp0 || KillsOp1) &&
1213 bool updateST0 = (TOS == Op0 && !KillsOp1) || (TOS == Op1 && !KillsOp0);
1231 unsigned NotTOS = (TOS == Op0) ? Op1 : Op0;
1239 if (KillsOp0 && KillsOp1 && Op0 != Op1) {
1264 unsigned Op1
[all...]
/freebsd-10.0-release/contrib/llvm/lib/Target/X86/AsmParser/
H A DX86AsmParser.cpp152 ICToken Op1 = OperandStack.pop_back_val(); local
158 Val = Op1.second + Op2.second;
162 Val = Op1.second - Op2.second;
166 assert (Op1.first == IC_IMM && Op2.first == IC_IMM &&
168 Val = Op1.second * Op2.second;
172 assert (Op1.first == IC_IMM && Op2.first == IC_IMM &&
175 Val = Op1.second / Op2.second;
2030 X86Operand *Op1 = static_cast<X86Operand*>(Operands[1]); local
2032 if (isSrcOp(*Op1) && Op2->isReg()) {
2049 delete Op1;
2060 X86Operand *Op1 = static_cast<X86Operand*>(Operands[1]); local
2096 X86Operand *Op1 = static_cast<X86Operand*>(Operands[2]); local
2103 X86Operand *Op1 = static_cast<X86Operand*>(Operands[1]); local
2115 X86Operand *Op1 = static_cast<X86Operand*>(Operands[1]); local
[all...]
/freebsd-10.0-release/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp403 SDValue Op1 = N->getOperand(1); local
462 if (SelectDirectAddr(Op1, Addr)) {
515 ? SelectADDRsi64(Op1.getNode(), Op1, Base, Offset)
516 : SelectADDRsi(Op1.getNode(), Op1, Base, Offset)) {
569 ? SelectADDRri64(Op1.getNode(), Op1, Base, Offset)
570 : SelectADDRri(Op1.getNode(), Op1, Bas
785 SDValue Op1 = N->getOperand(1); local
1216 SDValue Op1 = N->getOperand(1); local
1703 SDValue Op0, Op1; local
[all...]

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