/freebsd-10.0-release/contrib/llvm/lib/Target/R600/ |
H A D | AMDILISelDAGToDAG.cpp | 66 static bool isCPLoad(const LoadSDNode *N); 67 static bool isConstantLoad(const LoadSDNode *N, int cbID); 68 static bool isGlobalLoad(const LoadSDNode *N); 69 static bool isParamLoad(const LoadSDNode *N); 70 static bool isPrivateLoad(const LoadSDNode *N); 71 static bool isLocalLoad(const LoadSDNode *N); 72 static bool isRegionLoad(const LoadSDNode *N); 508 bool AMDGPUDAGToDAGISel::isConstantLoad(const LoadSDNode *N, int cbID) { 526 bool AMDGPUDAGToDAGISel::isGlobalLoad(const LoadSDNode *N) { 530 bool AMDGPUDAGToDAGISel::isParamLoad(const LoadSDNode * [all...] |
H A D | R600ISelLowering.cpp | 843 LoadSDNode *LoadNode = cast<LoadSDNode>(Op);
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/freebsd-10.0-release/contrib/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelDAGToDAG.cpp | 302 static bool isValidIndexedLoad(const LoadSDNode *LD) { 330 LoadSDNode *LD = cast<LoadSDNode>(N); 359 LoadSDNode *LD = cast<LoadSDNode>(N1);
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H A D | MSP430ISelLowering.cpp | 992 LoadSDNode *LD = cast<LoadSDNode>(N);
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/freebsd-10.0-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAGNodes.h | 1581 /// LSBaseSDNode - Base class for LoadSDNode and StoreSDNode 1587 common functionality shared between LoadSDNode and 1625 /// LoadSDNode - This class is used to represent ISD::LOAD nodes. 1627 class LoadSDNode : public LSBaseSDNode { class in class:llvm::SDNode 1629 LoadSDNode(SDValue *ChainPtrOff, DebugLoc dl, SDVTList VTs, function in class:llvm::SDNode::LoadSDNode 1784 typedef LoadSDNode LargestSDNode; 1795 const LoadSDNode *Ld = dyn_cast<LoadSDNode>(N); 1803 return isa<LoadSDNode>(N) && 1804 cast<LoadSDNode>( [all...] |
H A D | SelectionDAG.h | 1060 bool isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
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/freebsd-10.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 95 SDNode *SelectBaseOffsetLoad(LoadSDNode *LD, DebugLoc dl); 96 SDNode *SelectIndexedLoad(LoadSDNode *LD, DebugLoc dl); 97 SDNode *SelectIndexedLoadZeroExtend64(LoadSDNode *LD, unsigned Opcode, 99 SDNode *SelectIndexedLoadSignExtend64(LoadSDNode *LD, unsigned Opcode, 388 SDNode *HexagonDAGToDAGISel::SelectBaseOffsetLoad(LoadSDNode *LD, DebugLoc dl) { 434 SDNode *HexagonDAGToDAGISel::SelectIndexedLoadSignExtend64(LoadSDNode *LD, 498 SDNode *HexagonDAGToDAGISel::SelectIndexedLoadZeroExtend64(LoadSDNode *LD, 575 SDNode *HexagonDAGToDAGISel::SelectIndexedLoad(LoadSDNode *LD, DebugLoc dl) { 671 LoadSDNode *LD = cast<LoadSDNode>( [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/Mips/ |
H A D | Mips16ISelDAGToDAG.cpp | 129 LoadSDNode *SD = dyn_cast<LoadSDNode>(Parent);
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/freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 729 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) { 953 LoadSDNode *LD = cast<LoadSDNode>(N); 2508 LoadSDNode *Load = cast<LoadSDNode>( (N0.getOpcode() == ISD::LOAD) ? 2659 LoadSDNode *LN0 = cast<LoadSDNode>(N0); 2681 LoadSDNode *LN0 = cast<LoadSDNode>(N [all...] |
H A D | LegalizeTypes.h | 239 SDValue PromoteIntRes_LOAD(LoadSDNode *N); 312 void ExpandIntRes_LOAD (LoadSDNode *N, SDValue &Lo, SDValue &Hi); 519 SDValue ScalarizeVecRes_LOAD(LoadSDNode *N); 566 void SplitVecRes_LOAD(LoadSDNode *N, SDValue &Lo, SDValue &Hi); 653 LoadSDNode *LD); 661 LoadSDNode *LD, ISD::LoadExtType ExtType);
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H A D | LegalizeVectorOps.cpp | 155 LoadSDNode *LD = cast<LoadSDNode>(Op.getNode()); 379 LoadSDNode *LD = cast<LoadSDNode>(Op.getNode());
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H A D | SelectionDAGDumper.cpp | 445 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
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H A D | SelectionDAG.cpp | 433 const LoadSDNode *LD = cast<LoadSDNode>(N); 1919 LoadSDNode *LD = cast<LoadSDNode>(Op); 2294 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) { 3376 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 4437 cast<LoadSDNode>(E)->refineAlignment(MMO); 4440 SDNode *N = new (NodeAllocator) LoadSDNode(Op [all...] |
H A D | LegalizeTypesGeneric.cpp | 250 LoadSDNode *LD = cast<LoadSDNode>(N);
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H A D | LegalizeVectorTypes.cpp | 58 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break; 206 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) { 510 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi); 799 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo, 2082 LoadSDNode *LD = cast<LoadSDNode>(N); 2496 LoadSDNode *LD) { 2650 LoadSDNode * LD,
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H A D | LegalizeFloatTypes.cpp | 497 LoadSDNode *L = cast<LoadSDNode>(N); 1127 LoadSDNode *LD = cast<LoadSDNode>(N);
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H A D | TargetLowering.cpp | 1154 } else if (LoadSDNode *LN0 = dyn_cast<LoadSDNode>(N0)) { 1180 isa<LoadSDNode>(N0.getOperand(0)) && 1183 LoadSDNode *Lod = cast<LoadSDNode>(N0.getOperand(0));
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/freebsd-10.0-release/contrib/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 194 bool MatchLoadInAddress(LoadSDNode *N, X86ISelAddressMode &AM); 407 LoadSDNode *LD = dyn_cast<LoadSDNode>(Callee.getNode()); 602 bool X86DAGToDAGISel::MatchLoadInAddress(LoadSDNode *N, X86ISelAddressMode &AM){ 1003 if (!MatchLoadInAddress(cast<LoadSDNode>(N), AM)) 1355 LoadSDNode *LD = cast<LoadSDNode>(PatternNodeWithChain); 1373 LoadSDNode *LD = cast<LoadSDNode>(N.getOperand(0).getOperand(0)); 1851 LoadSDNode* [all...] |
H A D | X86ISelLowering.cpp | 2798 } else if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(Arg)) { 4293 /// is promoted to a vector. It also returns the LoadSDNode by reference if 4295 static bool isScalarLoadToVector(SDNode *N, LoadSDNode **LD = NULL) { 4302 *LD = cast<LoadSDNode>(N); 4992 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(SrcOp)) { 5074 LoadSDNode *LDBase = NULL; 5089 LDBase = cast<LoadSDNode>(Elt.getNode()); 5096 LoadSDNode *L [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 812 ? cast<LoadSDNode>(Op)->getAddressingMode() 848 ? cast<LoadSDNode>(Op)->getAddressingMode() 868 ? cast<LoadSDNode>(Op)->getAddressingMode() 941 ? cast<LoadSDNode>(Op)->getAddressingMode() 1343 ? cast<LoadSDNode>(Op)->getAddressingMode() 1414 LoadSDNode *LD = cast<LoadSDNode>(N); 1487 LoadSDNode *LD = cast<LoadSDNode>(N);
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H A D | ARMISelLowering.cpp | 1842 } else if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(Arg)) { 3147 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(Op)) 3164 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(Op)) { 5302 static SDValue SkipLoadExtensionForVMULL(LoadSDNode *LD, SelectionDAG& DAG) { 5334 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) 8442 !cast<LoadSDNode>(InNod [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 868 LoadSDNode *LD = cast<LoadSDNode>(Node); 1514 LoadSDNode *LD = cast<LoadSDNode>(N); 1516 // The select routine does not have access to the LoadSDNode instance, so
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H A D | NVPTXISelDAGToDAG.cpp | 168 LoadSDNode *LD = cast<LoadSDNode>(N); 437 // The last operand holds the original LoadSDNode::getExtensionType() value
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/freebsd-10.0-release/contrib/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 376 LoadSDNode *LD = cast<LoadSDNode>(Op); 1481 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(ST->getValue())) {
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/freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 1041 LoadSDNode *LD = cast<LoadSDNode>(N);
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