Searched refs:Latency (Results 1 - 15 of 15) sorted by relevance

/freebsd-10.0-release/contrib/llvm/include/llvm/MC/
H A DMCInstrItineraries.h173 unsigned Latency = 0, StartCycle = 0; local
176 Latency = std::max(Latency, StartCycle + IS->getCycles());
180 return Latency;
/freebsd-10.0-release/contrib/llvm/lib/CodeGen/
H A DTargetSchedule.cpp222 unsigned Latency = convertLatency(WLEntry->Cycles); local
224 return Latency;
229 return Latency;
231 return Latency - STI->getReadAdvanceCycles(UseDesc, UseIdx, WriteID);
260 unsigned Latency = 0; local
266 Latency = std::max(Latency, convertLatency(WLEntry->Cycles));
268 return Latency;
H A DCriticalAntiDepBreaker.cpp426 if (!Max || SU->getDepth() + SU->Latency > Max->getDepth() + Max->Latency)
433 << (Max->getDepth() + Max->Latency) << "\n");
H A DMachineScheduler.cpp1309 return SU->getDepth() + SU->Latency;
2119 unsigned Latency = 0; local
2139 Latency = Cand.SU->getDepth();
2142 Latency = Cand.SU->getHeight();
2145 Latency = Cand.SU->getHeight();
2148 Latency = Cand.SU->getDepth();
2161 if (Latency)
2162 dbgs() << " " << Latency << " cycles ";
H A DScheduleDAGInstrs.cpp687 // Assign the Latency field of SU using target-provided information.
688 SU->Latency = SchedModel.computeInstrLatency(SU->getInstr());
785 if (SU->NumSuccs == 0 && SU->Latency > 1
788 Dep.setLatency(SU->Latency - 1);
969 adjustChainDeps(AA, MFI, SU, &ExitSU, RejectMemNodes, /*Latency=*/0);
H A DAggressiveAntiDepBreaker.cpp733 ((SU->getDepth() + SU->Latency) >
734 (CriticalPathSU->getDepth() + CriticalPathSU->Latency))) {
H A DScheduleDAG.cpp331 dbgs() << " Latency : " << Latency << "\n";
349 dbgs() << ": Latency=" << I->getLatency();
369 dbgs() << ": Latency=" << I->getLatency();
/freebsd-10.0-release/contrib/llvm/include/llvm/CodeGen/
H A DScheduleDAG.h89 /// Latency - The time associated with this edge. Often this is just
90 /// the value of the Latency field of the predecessor, however advanced
92 unsigned Latency; member in class:llvm::SDep
93 /// Record MinLatency seperately from "expected" Latency.
116 Latency = 0;
120 Latency = 1;
123 MinLatency = Latency;
126 : Dep(S, Order), Contents(), Latency(0), MinLatency(0) {
146 && Latency == Other.Latency
299 unsigned short Latency; // Node latency. member in class:llvm::SUnit
[all...]
/freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.cpp92 SU->Latency = Old->Latency;
402 // Assign the Latency field of NodeSUnit using target-provided information.
483 unsigned OpLatency = isChain ? 1 : OpSU->Latency;
592 SU->Latency = 0;
598 SU->Latency = 1;
605 SU->Latency = HighLatencyCycles;
607 SU->Latency = 1;
613 SU->Latency = 0;
616 SU->Latency
[all...]
H A DScheduleDAGVLIW.cpp244 if (FoundSUnit->Latency) // Don't increment CurCycle for pseudo-ops!
H A DScheduleDAGFast.cpp340 D.setLatency(LoadSU->Latency);
418 FromDep.setLatency(SU->Latency);
421 ToDep.setLatency(CopyFromSU->Latency);
H A DScheduleDAGRRList.cpp1082 D.setLatency(LoadSU->Latency);
1172 FromDep.setLatency(SU->Latency);
1175 ToDep.setLatency(CopyFromSU->Latency);
2388 if (left->Latency != right->Latency)
2389 return left->Latency > right->Latency ? 1 : -1;
/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp3350 unsigned Latency = getInstrLatency(ItinData, DefMI); local
3356 if (Latency > 0 && Subtarget.isThumb2()) {
3361 --Latency;
3363 return Latency;
3375 int Latency = getOperandLatency(ItinData, *DefMCID, DefIdx, DefAlign, local
3378 if (Latency < 0)
3379 return Latency;
3386 if (Adj >= 0 || (int)Latency > -Adj) {
3387 return Latency + Adj;
3390 return Latency;
3409 int Latency = ItinData->getOperandCycle(DefMCID.getSchedClass(), DefIdx); local
3423 int Latency = getOperandLatency(ItinData, DefMCID, DefIdx, DefAlign, local
3617 unsigned Latency = 0; local
3645 unsigned Latency = ItinData->getStageLatency(Class); local
3688 int Latency = computeOperandLatency(ItinData, DefMI, DefIdx, UseMI, UseIdx, local
[all...]
/freebsd-10.0-release/sys/contrib/dev/acpica/include/
H A Dactbl3.h443 UINT32 Latency; member in struct:acpi_table_pcct
/freebsd-10.0-release/sys/contrib/dev/acpica/common/
H A Ddmtbinfo.c377 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C2Latency), "C2 Latency", 0},
378 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C3Latency), "C3 Latency", 0},
1613 {ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (ExitLatency), "Exit Latency", 0},
1680 {ACPI_DMT_UINT32, ACPI_PCCT_OFFSET (Latency), "Command Latency", 0},
1745 {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (ReadLatency), "Read Latency", 0},
1746 {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (WriteLatency), "Write Latency", 0},

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