Searched refs:Insn (Results 1 - 7 of 7) sorted by relevance

/freebsd-10.0-release/contrib/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp104 unsigned Insn,
109 unsigned Insn,
114 unsigned Insn,
119 unsigned Insn,
124 unsigned Insn,
129 unsigned Insn,
134 unsigned Insn,
139 unsigned Insn,
144 unsigned Insn,
149 unsigned Insn,
252 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) argument
270 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, unsigned &Op3) argument
286 Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
356 Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
369 Decode2RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
382 DecodeR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
395 Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
409 DecodeRUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
422 DecodeRUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
435 DecodeRUSSrcDstBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
449 DecodeL2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
520 DecodeL2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
534 DecodeLR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
548 Decode3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
561 Decode3RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
574 Decode2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
587 Decode2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
600 DecodeL3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
614 DecodeL3RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
629 DecodeL2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
643 DecodeL2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
657 DecodeL6RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
677 DecodeL5RInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
691 DecodeL5RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
711 DecodeL4RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
730 DecodeL4RSrcDstSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
[all...]
/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp196 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Insn,
198 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
201 unsigned Insn,
204 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Insn,
206 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst,unsigned Insn,
208 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Insn,
210 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Insn,
214 unsigned Insn,
217 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
219 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
1286 DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1431 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1580 DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1771 DecodeRFEInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1800 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1885 DecodeCPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1925 DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1967 DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1991 DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2018 DecodeSMLAInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2091 DecodeT2BInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2118 DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2161 DecodeVLDInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2435 DecodeVSTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2706 DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2753 DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2801 DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2836 DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2891 DecodeNEONModImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2936 DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2979 DecodeTBLInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3015 DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3127 DecodeT2LoadShift(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3270 DecodeT2LdStPre(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3315 DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3326 DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3351 DecodeThumbCPS(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3362 DecodePostIdxReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3409 DecodeThumbTableBranch(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3425 DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3546 DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3569 DecodeDoubleRegStore(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3596 DecodeLDRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3621 DecodeLDRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3649 DecodeSTRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3674 DecodeSTRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3699 DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3766 DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3832 DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3899 DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3963 DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4033 DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4097 DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4178 DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4250 DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4276 DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4302 DecodeIT(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4324 DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4361 DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4395 DecodeT2Adr(MCInst &Inst, uint32_t Insn, uint64_t Address, const void *Decoder) argument
4421 DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4448 DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4476 DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4504 DecodeImm0_4(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
[all...]
/freebsd-10.0-release/contrib/llvm/utils/TableGen/
H A DPseudoLoweringEmitter.cpp55 CodeGenInstruction &Insn,
73 addDagOperandMapping(Record *Rec, DagInit *Dag, CodeGenInstruction &Insn, argument
92 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec)
96 Insn.Operands[BaseIdx + i].Rec->getName() + "'");
100 for (unsigned I = 0, E = Insn.Operands[i].MINumOperands; I != E; ++I)
102 OpsAdded += Insn.Operands[i].MINumOperands;
111 addDagOperandMapping(Rec, SubDag, Insn, OperandMap, BaseIdx + i);
139 CodeGenInstruction Insn(Operator);
141 if (Insn.isCodeGenOnly || Insn
[all...]
H A DFixedLenDecoderEmitter.cpp374 void insnWithID(insn_t &Insn, unsigned Opcode) const { argument
387 Insn.push_back(BIT_UNSET);
389 Insn.push_back(bitFromBits(Bits, i));
403 bool fieldFromInsn(uint64_t &Field, insn_t &Insn, unsigned StartBit,
434 const insn_t &Insn) const;
511 insn_t Insn; local
514 Owner->insnWithID(Insn, Owner->Opcodes[i]);
518 bool ok = Owner->fieldFromInsn(Field, Insn, StartBit, NumBits);
926 bool FilterChooser::fieldFromInsn(uint64_t &Field, insn_t &Insn,
931 if (Insn[StartBi
[all...]
/freebsd-10.0-release/contrib/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp127 unsigned Insn,
137 unsigned Insn,
162 unsigned Insn,
168 unsigned Insn,
173 unsigned Insn,
177 static DecodeStatus DecodeFMem(MCInst &Inst, unsigned Insn,
182 unsigned Insn,
187 unsigned Insn,
192 unsigned Insn,
197 unsigned Insn,
285 uint32_t Insn; local
310 uint32_t Insn; local
412 DecodeMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
434 DecodeFMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
464 DecodeCondCode(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
543 DecodeBC1(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
553 DecodeJumpTarget(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
564 DecodeSimm16(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
572 DecodeInsSize(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
583 DecodeExtSize(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
[all...]
/freebsd-10.0-release/contrib/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp135 static DecodeStatus DecodeBitfieldInstruction(llvm::MCInst &Inst, unsigned Insn,
139 static DecodeStatus DecodeFMOVLaneInstruction(llvm::MCInst &Inst, unsigned Insn,
144 unsigned Insn,
454 static DecodeStatus DecodeBitfieldInstruction(llvm::MCInst &Inst, unsigned Insn, argument
457 unsigned Rd = fieldFromInstruction(Insn, 0, 5);
458 unsigned Rn = fieldFromInstruction(Insn, 5, 5);
459 unsigned ImmS = fieldFromInstruction(Insn, 10, 6);
460 unsigned ImmR = fieldFromInstruction(Insn, 16, 6);
461 unsigned SF = fieldFromInstruction(Insn, 31, 1);
466 Opc = (OpcTypes)fieldFromInstruction(Insn, 2
546 DecodeFMOVLaneInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
570 DecodeLDSTPairInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
734 DecodeSingleIndexedInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
[all...]
/freebsd-10.0-release/contrib/llvm/lib/Transforms/Scalar/
H A DCodeGenPrepare.cpp330 Instruction *Insn = dyn_cast<Instruction>(UPN->getIncomingValue(I)); local
331 if (Insn && Insn->getParent() == BB &&
332 Insn->getParent() != UPN->getIncomingBlock(I))
1988 Instruction *Insn = BI; ++BI; local
1989 DbgValueInst *DVI = dyn_cast<DbgValueInst>(Insn);
1991 PrevNonDbgInst = Insn;

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