AArch64/Disassembler/AArch64Disassembler.cpp

135 static DecodeStatus DecodeBitfieldInstruction(llvm::MCInst &Inst, unsigned Insn,
139 static DecodeStatus DecodeFMOVLaneInstruction(llvm::MCInst &Inst, unsigned Insn,
144                                               unsigned Insn,
454 static DecodeStatus DecodeBitfieldInstruction(llvm::MCInst &Inst, unsigned Insn,
457   unsigned Rd = fieldFromInstruction(Insn, 0, 5);
458   unsigned Rn = fieldFromInstruction(Insn, 5, 5);
459   unsigned ImmS = fieldFromInstruction(Insn, 10, 6);
460   unsigned ImmR = fieldFromInstruction(Insn, 16, 6);
461   unsigned SF = fieldFromInstruction(Insn, 31, 1);
466   Opc = (OpcTypes)fieldFromInstruction(Insn, 29, 2);
546 static DecodeStatus DecodeFMOVLaneInstruction(llvm::MCInst &Inst, unsigned Insn,
551   unsigned Rd = fieldFromInstruction(Insn, 0, 5);
552   unsigned Rn = fieldFromInstruction(Insn, 5, 5);
553   unsigned IsToVec = fieldFromInstruction(Insn, 16, 1);
571                                               unsigned Insn,
575   unsigned Rt = fieldFromInstruction(Insn, 0, 5);
576   unsigned Rn = fieldFromInstruction(Insn, 5, 5);
577   unsigned Rt2 = fieldFromInstruction(Insn, 10, 5);
578   unsigned SImm7 = fieldFromInstruction(Insn, 15, 7);
579   unsigned L = fieldFromInstruction(Insn, 22, 1);
580   unsigned V = fieldFromInstruction(Insn, 26, 1);
581   unsigned Opc = fieldFromInstruction(Insn, 30, 2);
585   unsigned Indexed = fieldFromInstruction(Insn, 23, 1);
735                                                    unsigned Insn,
738   unsigned Rt = fieldFromInstruction(Insn, 0, 5);
739   unsigned Rn = fieldFromInstruction(Insn, 5, 5);
740   unsigned Imm9 = fieldFromInstruction(Insn, 12, 9);
742   unsigned Opc = fieldFromInstruction(Insn, 22, 2);
743   unsigned V = fieldFromInstruction(Insn, 26, 1);
744   unsigned Size = fieldFromInstruction(Insn, 30, 2);