/freebsd-10.0-release/contrib/llvm/lib/Target/MBlaze/ |
H A D | MBlazeInstrInfo.cpp | 118 SmallVectorImpl<MachineOperand> &Cond, 146 Cond.push_back(MachineOperand::CreateImm(LastInst->getOpcode())); 147 Cond.push_back(LastInst->getOperand(0)); 165 Cond.push_back(MachineOperand::CreateImm(SecondLastInst->getOpcode())); 166 Cond.push_back(SecondLastInst->getOperand(0)); 189 const SmallVectorImpl<MachineOperand> &Cond, 193 assert((Cond.size() == 2 || Cond.size() == 0) && 197 if (!Cond.empty()) 198 Opc = (unsigned)Cond[ 115 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument 187 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsInstrInfo.cpp | 79 SmallVectorImpl<MachineOperand> &Cond) const { 86 Cond.push_back(MachineOperand::CreateImm(Opc)); 89 Cond.push_back(Inst->getOperand(i)); 95 SmallVectorImpl<MachineOperand> &Cond, 98 BranchType BT = AnalyzeBranch(MBB, TBB, FBB, Cond, AllowModify, BranchInstrs); 105 const SmallVectorImpl<MachineOperand>& Cond) 107 unsigned Opc = Cond[0].getImm(); 111 for (unsigned i = 1; i < Cond.size(); ++i) { 112 if (Cond[i].isReg()) 113 MIB.addReg(Cond[ 92 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument 123 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument 190 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify, SmallVectorImpl<MachineInstr*> &BranchInstrs) const argument [all...] |
H A D | MipsInstrInfo.h | 50 SmallVectorImpl<MachineOperand> &Cond, 57 const SmallVectorImpl<MachineOperand> &Cond, 61 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; 65 SmallVectorImpl<MachineOperand> &Cond, 130 SmallVectorImpl<MachineOperand> &Cond) const; 133 const SmallVectorImpl<MachineOperand>& Cond) const;
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/freebsd-10.0-release/contrib/llvm/tools/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
H A D | ConstraintManager.h | 68 DefinedSVal Cond, 75 ProgramStatePair assumeDual(ProgramStateRef State, DefinedSVal Cond) { argument 76 ProgramStateRef StTrue = assume(State, Cond, true); 78 // If StTrue is infeasible, asserting the falseness of Cond is unnecessary 86 assert(assume(State, Cond, false) && "System is over constrained."); 91 ProgramStateRef StFalse = assume(State, Cond, false);
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/freebsd-10.0-release/contrib/llvm/lib/Target/XCore/ |
H A D | XCoreInstrInfo.cpp | 189 SmallVectorImpl<MachineOperand> &Cond, 222 Cond.push_back(MachineOperand::CreateImm(BranchCode)); 223 Cond.push_back(LastInst->getOperand(0)); 244 Cond.push_back(MachineOperand::CreateImm(BranchCode)); 245 Cond.push_back(SecondLastInst->getOperand(0)); 277 const SmallVectorImpl<MachineOperand> &Cond, 281 assert((Cond.size() == 2 || Cond.size() == 0) && 285 if (Cond.empty()) { 290 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[ 187 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument 275 InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument [all...] |
H A D | XCoreInstrInfo.h | 54 SmallVectorImpl<MachineOperand> &Cond, 59 const SmallVectorImpl<MachineOperand> &Cond, 88 SmallVectorImpl<MachineOperand> &Cond) const;
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/freebsd-10.0-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.h | 64 SmallVectorImpl<MachineOperand> &Cond, 69 const SmallVectorImpl<MachineOperand> &Cond, 90 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const 97 // When returning true, set Cond to the mask of condition-code 101 bool isBranch(const MachineInstr *MI, unsigned &Cond,
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H A D | SystemZInstrInfo.cpp | 107 SmallVectorImpl<MachineOperand> &Cond, 146 Cond.clear(); 163 if (Cond.empty()) { 167 Cond.push_back(MachineOperand::CreateImm(ThisCond)); 172 assert(Cond.size() == 1); 181 unsigned OldCond = Cond[0].getImm(); 200 unsigned Cond; local 202 if (!isBranch(I, Cond, Target)) 218 const SmallVectorImpl<MachineOperand> &Cond, 226 assert((Cond 104 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument 216 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument 351 isBranch(const MachineInstr *MI, unsigned &Cond, const MachineOperand *&Target) const argument [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrInfo.h | 74 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; 78 SmallVectorImpl<MachineOperand> &Cond, 84 const SmallVectorImpl<MachineOperand> &Cond,
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H A D | MSP430InstrInfo.cpp | 127 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { 128 assert(Cond.size() == 1 && "Invalid Xbranch condition!"); 130 MSP430CC::CondCodes CC = static_cast<MSP430CC::CondCodes>(Cond[0].getImm()); 154 Cond[0].setImm(CC); 172 SmallVectorImpl<MachineOperand> &Cond, 207 Cond.clear(); 231 if (Cond.empty()) { 234 Cond.push_back(MachineOperand::CreateImm(BranchCode)); 240 assert(Cond.size() == 1); 248 MSP430CC::CondCodes OldBranchCode = (MSP430CC::CondCodes)Cond[ 169 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument 260 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument [all...] |
H A D | MSP430BranchSelector.cpp | 150 SmallVector<MachineOperand, 1> Cond; local 151 Cond.push_back(I->getOperand(1)); 154 TII->ReverseBranchCondition(Cond); 156 .addImm(4).addOperand(Cond[0]);
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/freebsd-10.0-release/contrib/llvm/tools/clang/lib/StaticAnalyzer/Core/ |
H A D | SimpleConstraintManager.h | 36 ProgramStateRef assume(ProgramStateRef state, DefinedSVal Cond, 39 ProgramStateRef assume(ProgramStateRef state, Loc Cond, bool Assumption); 41 ProgramStateRef assume(ProgramStateRef state, NonLoc Cond, bool Assumption); 90 Loc Cond, 94 NonLoc Cond,
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H A D | SimpleConstraintManager.cpp | 69 DefinedSVal Cond, 71 if (Optional<NonLoc> NV = Cond.getAs<NonLoc>()) 73 return assume(state, Cond.castAs<Loc>(), Assumption); 85 Loc Cond, bool Assumption) { 86 switch (Cond.getSubKind()) { 93 const MemRegion *R = Cond.castAs<loc::MemRegionVal>().getRegion(); 111 bool b = Cond.castAs<loc::ConcreteInt>().getValue() != 0; 146 NonLoc Cond, 151 if (!canReasonAbout(Cond)) { 153 SymbolRef sym = Cond 68 assume(ProgramStateRef state, DefinedSVal Cond, bool Assumption) argument 84 assumeAux(ProgramStateRef state, Loc Cond, bool Assumption) argument 145 assumeAux(ProgramStateRef state, NonLoc Cond, bool Assumption) argument [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/NVPTX/ |
H A D | NVPTXInstrInfo.cpp | 172 SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const { 189 Cond.push_back(LastInst->getOperand(0)); 207 Cond.push_back(SecondLastInst->getOperand(0)); 253 const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const { 256 assert((Cond.size() == 1 || Cond.size() == 0) && 261 if (Cond.empty()) // Unconditional branch 264 BuildMI(&MBB, DL, get(NVPTX::CBranch)).addReg(Cond[0].getReg()) 270 BuildMI(&MBB, DL, get(NVPTX::CBranch)).addReg(Cond[0].getReg()).addMBB(TBB); 170 AnalyzeBranch( MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument 251 InsertBranch( MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument
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H A D | NVPTXInstrInfo.h | 65 SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const; 69 const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const;
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/freebsd-10.0-release/contrib/llvm/lib/Target/Sparc/ |
H A D | SparcInstrInfo.h | 75 SmallVectorImpl<MachineOperand> &Cond, 82 const SmallVectorImpl<MachineOperand> &Cond,
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/freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.h | 116 SmallVectorImpl<MachineOperand> &Cond, 121 const SmallVectorImpl<MachineOperand> &Cond, 126 const SmallVectorImpl<MachineOperand> &Cond, 131 const SmallVectorImpl<MachineOperand> &Cond, 158 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
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H A D | PPCInstrInfo.cpp | 229 SmallVectorImpl<MachineOperand> &Cond, 261 Cond.push_back(LastInst->getOperand(0)); 262 Cond.push_back(LastInst->getOperand(1)); 271 Cond.push_back(MachineOperand::CreateImm(1)); 272 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, 282 Cond.push_back(MachineOperand::CreateImm(0)); 283 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, 307 Cond.push_back(SecondLastInst->getOperand(0)); 308 Cond.push_back(SecondLastInst->getOperand(1)); 320 Cond 227 AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument 390 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument 428 canInsertSelect(const MachineBasicBlock &MBB, const SmallVectorImpl<MachineOperand> &Cond, unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const argument 466 insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc dl, unsigned DestReg, const SmallVectorImpl<MachineOperand> &Cond, unsigned TrueReg, unsigned FalseReg) const argument [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.cpp | 140 /// setting TBB to the destination basic block and populating the Cond vector 145 SmallVectorImpl<MachineOperand> &Cond) { 154 Cond.push_back(MachineOperand::CreateImm(I->getOpcode())); 155 Cond.push_back(I->getOperand(0)); 163 Cond.push_back(MachineOperand::CreateImm(I->getOpcode())); 164 Cond.push_back(I->getOperand(0)); 165 Cond.push_back(I->getOperand(1)); 177 SmallVectorImpl<MachineOperand> &Cond, 203 classifyCondBranch(LastInst, TBB, Cond); 239 Cond 144 classifyCondBranch(MachineInstr *I, MachineBasicBlock *&TBB, SmallVectorImpl<MachineOperand> &Cond) argument 175 AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument 304 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument [all...] |
H A D | AArch64InstrInfo.h | 63 SmallVectorImpl<MachineOperand> &Cond, 67 const SmallVectorImpl<MachineOperand> &Cond, 70 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
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/freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1068 ISD::CondCode Cond, bool foldBooleans, 1073 switch (Cond) { 1084 return DAG.getSetCC(dl, VT, N1, N0, ISD::getSetCCSwappedOperands(Cond)); 1097 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 1099 if ((C1 == 0) == (Cond == ISD::SETEQ)) { 1102 Cond = ISD::SETNE; 1106 Cond = ISD::SETEQ; 1110 Zero, Cond); 1127 if ((Cond 1067 SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, bool foldBooleans, DAGCombinerInfo &DCI, DebugLoc dl) const argument [all...] |
/freebsd-10.0-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 767 inline bool isTrueWhenEqual(CondCode Cond) { argument 768 return ((int)Cond & 1) != 0; 775 inline unsigned getUnorderedFlavor(CondCode Cond) { argument 776 return ((int)Cond >> 3) & 3;
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/freebsd-10.0-release/contrib/ldns/compat/ |
H A D | b64_ntop.c | 65 #define Assert(Cond) if (!(Cond)) abort()
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/freebsd-10.0-release/contrib/llvm/tools/clang/lib/Sema/ |
H A D | ScopeInfo.cpp | 141 if (const ConditionalOperator *Cond = dyn_cast<ConditionalOperator>(E)) { 142 markSafeWeakUse(Cond->getTrueExpr()); 143 markSafeWeakUse(Cond->getFalseExpr()); 147 if (const BinaryConditionalOperator *Cond = 149 markSafeWeakUse(Cond->getCommon()); 150 markSafeWeakUse(Cond->getFalseExpr());
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/freebsd-10.0-release/contrib/llvm/lib/Target/R600/ |
H A D | SIAnnotateControlFlow.cpp | 80 void handleLoopCondition(Value *Cond); 203 void SIAnnotateControlFlow::handleLoopCondition(Value *Cond) { argument 204 if (PHINode *Phi = dyn_cast<PHINode>(Cond)) { 246 } else if (Instruction *Inst = dyn_cast<Instruction>(Cond)) { 249 Value *Args[] = { Cond, PhiInserter.GetValueAtEndOfBlock(Parent) }; 266 Value *Cond = Term->getCondition(); local 268 handleLoopCondition(Cond);
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