Searched refs:CVMX_CACHE_LINE_SIZE (Results 1 - 8 of 8) sorted by relevance

/freebsd-10.0-release/sys/mips/cavium/
H A Dcvmx_config.h176 #define CVMX_FPA_POOL_0_SIZE (15 * CVMX_CACHE_LINE_SIZE)
177 #define CVMX_FPA_POOL_1_SIZE (1 * CVMX_CACHE_LINE_SIZE)
178 #define CVMX_FPA_POOL_2_SIZE (8 * CVMX_CACHE_LINE_SIZE)
179 #define CVMX_FPA_POOL_3_SIZE (0 * CVMX_CACHE_LINE_SIZE)
180 #define CVMX_FPA_POOL_4_SIZE (0 * CVMX_CACHE_LINE_SIZE)
181 #define CVMX_FPA_POOL_5_SIZE (0 * CVMX_CACHE_LINE_SIZE)
182 #define CVMX_FPA_POOL_6_SIZE (0 * CVMX_CACHE_LINE_SIZE)
183 #define CVMX_FPA_POOL_7_SIZE (0 * CVMX_CACHE_LINE_SIZE)
/freebsd-10.0-release/sys/contrib/octeon-sdk/
H A Dcvmx-utils.h101 #define CVMX_CACHE_LINE_SIZE (128) // In bytes macro
102 #define CVMX_CACHE_LINE_MASK (CVMX_CACHE_LINE_SIZE - 1) // In bytes
103 #define CVMX_CACHE_LINE_ALIGNED __attribute__ ((aligned (CVMX_CACHE_LINE_SIZE)))
H A Dcvmx-helper-fpa.c73 uint64_t align = CVMX_CACHE_LINE_SIZE;
H A Dcvmx-l2c.c357 len -= CVMX_CACHE_LINE_SIZE;
358 ptr += CVMX_CACHE_LINE_SIZE;
456 fault_in(addr, CVMX_CACHE_LINE_SIZE);
488 start += CVMX_CACHE_LINE_SIZE;
489 len -= CVMX_CACHE_LINE_SIZE;
577 start += CVMX_CACHE_LINE_SIZE;
578 len -= CVMX_CACHE_LINE_SIZE;
985 CVMX_CACHE_LINE_SIZE;
1131 index * CVMX_CACHE_LINE_SIZE),
H A Dcvmx-hfa.h71 #define CVMX_FPA_DFA_POOL_SIZE (2 * CVMX_CACHE_LINE_SIZE)
H A Dcvmx-tim.c166 * sizeof(cvmx_tim_bucket_entry_t), CVMX_CACHE_LINE_SIZE);
H A Dcvmx-app-init.c486 for (addr = 0; addr < CVMX_CACHE_LINE_SIZE * num_lines; addr += 8)
H A Dcvmx-helper.c1122 mem = cvmx_bootmem_alloc(__CVMX_SSO_RWQ_SIZE * cvm_oct_sso_number_rwq_bufs, CVMX_CACHE_LINE_SIZE);

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